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IS25LP256D-RLLA3-TR 数据表(PDF) 8 Page - Integrated Silicon Solution, Inc

部件名 IS25LP256D-RLLA3-TR
功能描述  SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  179 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LP256D-RLLA3-TR 数据表(HTML) 8 Page - Integrated Silicon Solution, Inc

Back Button IS25LP256D-RLLA3-TR Datasheet HTML 4Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 5Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 6Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 7Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 8Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 9Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 10Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 11Page - Integrated Silicon Solution, Inc IS25LP256D-RLLA3-TR Datasheet HTML 12Page - Integrated Silicon Solution, Inc Next Button
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IS25LP256D
IS25WP256D
Integrated Silicon Solution, Inc.- www.issi.com
8
Rev A15
08/05/2024
3.
For compatibility, the pin can be disabled on dedicated part numbers by setting Bit0 (Dedicated RESET#
Disable) of the Function Register to “1” (default is “0” from factory on dedicated part numbers). An internal
pull-up resistor exists and the pin may be left floating if not used.
16-pin SOIC / 24-ball TFBGA
Device with HOLD#/RESET#
Device with dedicated RESET#
Pin1 / Ball D4
Hold#(IO3) or RESET#(IO3) by P7 bit setting
Hold#(IO3) only regardless of P7 bit setting
Pin3 / Ball A4
NC
RESET#
Part Number Option
J
R or P



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