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IS25LP256D-RHLA3-TR 数据表(PDF) 144 Page - Integrated Silicon Solution, Inc |
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IS25LP256D-RHLA3-TR 数据表(HTML) 144 Page - Integrated Silicon Solution, Inc |
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144 / 179 page ![]() IS25LP256D IS25WP256D Integrated Silicon Solution, Inc.- www.issi.com 144 Rev A15 08/05/2024 8.49 ENTER 4-BYTE ADDRESS MODE OPERATION (EN4B, B7h) The Enter 4-byte Address Mode instruction allows 32bit address (A31-A0) to be used to access the memory array beyond 128Mb. To execute EN4B operation, the host drives CE# low, sends the instruction code and then drives CE# high. The Exit 4-byte Address Mode instruction can be used to exit the 4-byte address mode. Note: The EN4B instruction will set the Bit 7 (EXTADD) of the volatile Bank Address Register to “1”, but will not change the non-volatile Bank Address Register. Figure 8.112 Enter 4-byte Address Mode Sequence In SPI Mode Instruction = B7h CE# SCK SI 0 1 2 3 4 5 6 7 Mode 3 Mode 0 SO High Impedance Figure 8.113 Enter 4-byte Address Mode Sequence In QPI Mode B7h CE# SCK IO[3:0] 0 1 Mode 3 Mode 0 |
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