IS25LP256D-RHLA3-TR datasheet(154/179 Pages) ISSI

部件名	IS25LP256D-RHLA3-TR

功能描述	SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE

PDF	179 Pages

Scroll/Zoom	100%

制造商	ISSI [Integrated Silicon Solution, Inc]

网页	http://www.issi.com

标志

154 / 179 page

IS25LP256D

IS25WP256D

Integrated Silicon Solution, Inc.- www.issi.com

154

Rev A15

08/05/2024

8.56 READ ASP OPERATION (RDASP, 2Bh)

The RDASP instruction code is shifted in by the rising edge of the SCK signal. Then the 16-bit ASP register contents

is shifted out, least significant byte first, most significant bit of each byte first. Each bit is shifted out at the SCK

frequency by the falling edge of the SCK signal. It is possible to read the ASP register continuously by providing

multiples of 16 bits. The maximum operating clock frequency for the RDASP command is the same with Fast Read

Operation.

Figure 8.132 Read ASP Sequence In SPI Mode

...

Instruction = 2Bh

CE #

SCK

Mode 3

Mode 0

...

st byte Data Out

nd byte Data Out

Figure 8.133 Read ASP Sequence In QPI Mode

2Bh

CE#

SCK

IO[3:0]

Mode 3

Mode 0

st byte

Data Out

nd byte

Data Out

IS25LP256D-RHLA3-TR 数据表(PDF) 154 Page - Integrated Silicon Solution, Inc