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IS25LE512M-RLLA3:P-TY 数据表(PDF) 39 Page - Integrated Silicon Solution, Inc

部件名 IS25LE512M-RLLA3:P-TY
功能描述  SERIAL FLASH MEMORY 133/112MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  189 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LE512M-RLLA3:P-TY 数据表(HTML) 39 Page - Integrated Silicon Solution, Inc

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IS25LE512M
IS25WE512M
Integrated Silicon Solution, Inc.- www.issi.com
39
Rev. A6
06/16/2025
6.7 ECC REGISTER
Related Commands: Read ECC Register (RDECC B3h) (1), Write ECC Register (WRECC B5h), Clear ECC Register
(CLECC, B6h).
Note:
1. 512Mb is an MCP of two 256Mb die, so the ECC register data after RDECC command is from one die
(previously selected die), and additional dummy read from another die (to select another die) + RDECC
command is required to get ECC register data from another die .
Table 6.26 ECC Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
IPA_ECCB
ECCCOUNTER
ECCEVENT
ECCONOFF
Default
0
0
0
0
0
0
0
0
Table 6.27 ECC Register Bit Definition (per die)
Bit
Name
Definition
Read-
/Write
Type
0
ECCONOFF
ECC ON/OFF bit:
"0" indicates ECC is ON (default)
"1" indicates ECC is OFF
R/W
Volatile
1
ECCEVENT
ECC Event bit:
"0" indicates NO ECC correction event (default)
"1" indicates YES ECC correction event
R
Volatile
5:2
ECCCOUNTER
Store cumulative ECC correction occurrence.
Max. 15 ECC correction occurrence can be stored, and stays 15
after further occurrence.
“0000” is the default value.
R
Volatile
6
IPA_ECCB
Incremental Programming Attempt within ECC boundary bit:
“0” indicates NO IPA within ECC Boundary (default)
“1” indicates YES IPA with ECC Boundary.
Incremental Programming within ECC boundary is not allowed, and
automatically ignored when ECC is ON.
R
Volatile
7
Reserved
Reserved
R
Reserved



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