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STM8AF6268ITAX 数据表(PDF) 96 Page - STMicroelectronics

部件名 STM8AF6268ITAX
功能描述  Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V
PDF  99 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM8AF6268ITAX 数据表(HTML) 96 Page - STMicroelectronics

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Revision history
STM8AF6246/48/66/68
96/99
DocID14952 Rev 11
31-Jan-2011
5
(continued)
Renamed Fast Active Halt mode to Active-halt mode with regulator
on, and Slow Active Halt mode to Active-halt mode with regulator off.
Updated Table: Total current consumption in Halt and Active-halt
modes. General conditions for VDD apply, TA = -40 to 55 °C, in
particular IDD(FAH) and IDD(SAH) renamed IDD(AH); tWU(FAH) and
tWU(SAH) renamed tWU(AH), and temperature condition added.
Removed IDD(USART) from Table: Typical peripheral current
consumption VDD = 5.0 V.
Updated general conditions in Section: Memory characteristics.
Modified TWE maximum value in Table: Flash program memory and
Table: Data memory.
Update Ilkg ana maximum value for TA ranging from −40 to 150 °C in
Table: I/O static characteristics.
Added tIFP(NRST) and renamed VF(NRST) tIFP in Table: NRST pin
characteristics. Added recommendations concerning NRST pin level
above Figure: Recommended reset pin protection, and updated
external capacitor value.
Added Raisonance compiler in Section: Software tools.
Moved know limitations to separate errata sheet.
18-Jul-2012
6
Updated wildcards of document part numbers.
Table: Device summary: updated the footnotes to all STM8AF61xx
part numbers.
Section: Introduction: small text change in first paragraph.
Table: STM8AF62xx product line-up: added “P” version for all order
codes; updated RAM.
Table: STM8AF/H61xx product line-up: added “P” version for all
order codes.
Figure: STM8A block diagram: updated POR, BOR and WDG;
updated LINUART input; added legend.
Section: Flash program and data EEPROM: removed non relevant
bullet points and added a sentence about the factory programmer.
Table: Peripheral clock gating bit assignments in CLK_PCKENR1/2
registers: updated
ADC features: updated ADC input range.
Table: Memory model for the devices covered in this datasheet:
updated 16 Kbyte and 8 Kbyte information.
Table: Option bytes: updated factory default setting for NOPT17;
added footnote 1.
Section: Minimum and maximum values: TA = -40 °C (not
40 °C).
Table: General operating conditions: updated VCAP.
Table: Total current consumption in Run, Wait and Slow mode
General conditions for VDD apply, TA = -40 to 150 °C: updated
conditions for IDD(RUN).
Table: I/O static characteristics: added new condition and new max
values for rise and fall time; updated the footnote.
Table 50. Document revision history (continued)
Date
Revision
Changes



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