1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

D+

D

-

V

BUS

DGNDU

HID0

HID1

HID2

SEL0

SEL1

V

CCC

AGNDC

V L

IN

V R

IN

V

COM

SSPND

DIN

V

CCX

AGNDX

XTO

V

CCP2

DGND

V

CCP1

V

L

OUT

XTI

DOUT

V

DD

AGNDP

V

R

OUT

PCM2903C

SBFS038A – JUNE 2012 – REVISED SEPTEMBER 2015

www.ti.com

6 Pin Configuration and Functions

DB Package

28-Pin SSOP

Top View

Pin Functions

PIN

DESCRIPTION

NAME

NO.

I/O

AGNDC

11

–

Analog ground for codec

AGNDP

18

–

Analog ground for PLL

AGNDX

22

–

Analog ground for oscillator

D–

2

I/O

USB differential input/output minus(1)

D+

1

I/O

USB differential input/output plus (1)

DGND

26

–

Digital ground

DGNDU

4

–

Digital ground for USB transceiver

DIN

24

I

S/PDIF input (2)

DOUT

25

O

S/PDIF output

HID0

5

I

HID key state input (mute), active-high(3)

HID1

6

I

HID key state input (volume up), active-high(3)

HID2

7

I

HID key state input (volume down), active-high(3)

SEL0

8

I

Must be set to high(4)

SEL1

9

I

Connected to the USB port of VBUS

(4)

SSPND

28

O

Suspend flag, active-low (Low: suspend, High: operational)

VBUS

3

–

Must be connected to VDD

VCCC

10

–

Analog power supply for codec(5)

VCCP1

17

–

Analog power supply for PLL(5)

VCCP2

19

–

Analog power supply for PLL(5)

VCCX

23

–

Analog power supply for oscillator(5)

VCOM

14

–

Common for ADC/DAC (VCCC/2)

(5)

VDD

27

–

Digital power supply(5)

VINL

12

I

ADC analog input for L-channel

VINR

13

I

ADC analog input for R-channel

VOUTL

16

O

DAC analog output for L-channel

VOUTR

15

O

DAC analog output for R-channel

XTI

21

I

Crystal oscillator input(6)

XTO

20

O

Crystal oscillator output

(1)

LV-TTL level.

(2)

3.3-V CMOS-level input with internal pulldown, 5-V tolerant.

(3)

3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or

volume down, which have no direct connection with the internal DAC or ADC. See the Interface Number 3 and End-Points sections.

(4)

TTL Schmitt trigger, 5-V tolerant.

(5)

Connect a decoupling capacitor to GND.

(6)

3.3-V CMOS-level input.

4

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