L99PM62XP_V01 datasheet(90/98 Pages) STMICROELECTRONICS

90 / 98 page

ST SPI

L99PM62XP

90/98

Doc ID 16363 Rev 4

Status register 1

SPI error (DI

stuck)

0100

001

TSD1

0101

000

TSD2

0111

001

V1 fail

0100

100

Other device

failure(8)

0100

000

The following status bits are reported in the global error flag:

Global status register: Bits 0 - 6

Status register 1: Bits 0 – 10

Status register 3: Bits 2, 3, 15

Invalid CLOCK COUNT.

Cleared with CLR command on SR3.

Cleared with “READ and CLEAR” on SR3 (-> TSD1).

Diagnosis bit only, Vs Fail is not a fail-safe event; cleared by read&clear. Bit is automatically cleared at (Vs > VsUV) and.

(Vs < VsOV) if Vlock_out_en = 0.

Cleared with a valid WD trigger (WD fail) or by clearing the corresponding status register related to failure.

Slow Vs ramp-up (Vs undervoltage is filtered with 64 µs after Power-on reset).

The global error flag is raised due to a failure condition which is not reported in the global status register. The Failure is

reported in the status registers 1 – 3.

Table 93.

Global status register (continued)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Hex

value

Table 94.

Status register 1: command and data bytes

Command byte

1st data byte

2nd data byte

Read/write

Address

Bit <15:8>

Bit<7:0>

010001

Data, 8bit

Data, 8 bit

Table 95.

Status register 1, data bytes

1st data byte <15:8>

2nd data byte <7:0>

Function

OUT4

OUT3

OUT2

OUT1

fail

short

Out4

Out3

OUT2

Out1

Rel2

Rel1

Group

Diagnosis 1

Diagnosis 2

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