A ceramic capacitor of at least a 0.1 μF must be connected to the output to improve stability and help filter out

high frequency noise. Add an additional 10 μF capacitor in parallel to improve transient performance in response

to sudden changes in load current; however, keep in mind that doing so increases the start-up time of the device.

Best performance and stability is attained with low-ESR, low-inductance ceramic chip-type output capacitors

(X5R, X7R, or similar). If using an electrolytic capacitor on the output, place a 0.1 μF ceramic capacitor in

parallel to reduce overall ESR on the output. Place the input and output capacitors as close as possible to the

device.

10.3.2.3 Selection of ADC

ADS7038-Q1 12-bit 8 channel multiplexed ADC is chosen for this application. The ADC offers low current

operation with averaging mode to increase the resolution to 16-bit with internal averaging modes while operating

with slow sampling speed.

10.3.3 Application Curves

Table 10-2 shows the captured measurement results for various DC inputs. The ADC output is captured and

analyzed for output accuracy, code spread and sigma with REF35500-Q1 as power supply vs LDO as power

supply.

REF35-Q1 offers better accuracy and lower noise than the LDO device at lower quiescent current. This results in

lower error in measurement as well as lower ADC output code variation across various OSR seetings.

Table 10-2. DC Input Performance Test Results

INPUT V

ADC OSR SETTING

REF35500

LDO

ERROR

CODE SPREAD

ERROR

CODE SPREAD

1.0 V

0

0.01 mV

32 LSB

8.9 mV

48 LSB

8

0.3 mV

10 LSB

9.21 mV

16 LSB

128

0.38 mV

6 LSB

9.26 mV

6 LSB

2.5 V

0

0.69 mV

32 LSB

22.89 mV

64 LSB

8

1.44 mV

10 LSB

23.63 mV

18 LSB

128

1.17 mV

3 LSB

23.41 mV

5 LSB

4 V

0

2.27 mV

32 LSB

37.84 mV

48 LSB

8

3.01 mV

24 LSB

38.62 mV

24 LSB

128

2.46 mV

3 LSB

38.09 mV

17 LSB

10.4 Power Supply Recommendations

The REF35 family of references feature an extremely low-dropout voltage. These references can be operated

with a supply of only 50 mV above the output voltage at no load. TI recommends a supply bypass capacitor

ranging between 0.1 µF to 10 µF.

10.5 Layout

10.5.1 Layout Guidelines

Figure 10-3 shows an example of a PCB layout for a data acquisition system using the REF35-Q1. Some key

considerations are:

• Connect low-ESR, 0.1 μF ceramic bypass capacitors at VIN, VREF of the REF35-Q1.

• Decouple other active devices in the system per the device specifications.

• Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise

pickup.

• Place the external components as close to the device as possible.

• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when absolutely necessary.

Figure 10-4 shows the pin compatibility with TI REF31xx series reference in the 3-pin SOT-23 package when

using the REF35xxx family footprint. You must rotate the REF31xx reference device by 180º before assembly.

REF35-Q1

SNAS845 – AUGUST 2023

www.ti.com

22

Submit Document Feedback

Copyright © 2023 Texas Instruments Incorporated

Product Folder Links: REF35-Q1