SN74ACT74DR.A datasheet(3/41 Pages) TI2

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3 Pin Configuration and Functions

1CLK

1PRE

GND

2CLR

VCC

2CLK

2PRE

1CLR

SN54ACT74 J or W Package; SN74ACT74 D, DB, N,

NS, PW (Top View)

20 19

10 11 12 13

1CLK

1PRE

NC VCC

1Q GND NC 2Q 2Q

2CLK

2PRE

SN54ACT74 FK Package (Top View)

1CLK

1PRE

GND

2CLR

2CLK

2PRE

PAD

1CLR

VCC

Figure 3-1. SN54ACT74 BQA Package (Top View)

TYPE(1)

DESCRIPTION

NAME

NO.

1 CLR

Input

Channel 1, Clear Input, Active Low

Input

Channel 1, Data Input

1CLK

Input

Channel 1, Positive edge triggered clock input

1 PRE

Input

Channel 1, Preset Input, Active Low

Output

Channel 1, Output

1 Q

Output

Channel 1, Inverted Output

GND

—

Ground

2 Q

Output

Channel 2, Inverted Output

Output

Channel 2, Output

2 PRE

Input

Channel 2, Preset Input, Active Low

2CLK

Input

Channel 2, Positive edge triggered clock input

Input

Channel 2, Data Input

2 CLR

Input

Channel 2, Clear Input, Active Low

VCC

—

Positive Supply

(1)

Signal Types: I = Input, O = Output, I/O = Input or Output

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SN54ACT74, SN74ACT74

SCAS520J – AUGUST 1995 – REVISED APRIL 2025

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