SN74AXC1T45DBVR datasheet(21/45 Pages) TI2

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8.2.2 Bidirectional Logic Level-Shifting Application

Figure 8-3 shows the SN74AXC1T45 being used in a bidirectional logic level-shifting application. Because the

SN74AXC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid

bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.

VCC1

VCC2

SYSTEM-1

SYSTEM-2

DIR CTRL

I/O-1

I/O-2

Pullup/Pulldown

or Bus Hold†

VCC2

Pullup/Pulldown

or Bus Hold†

Figure 8-3. Bidirectional Logic Level-Shifting Application

Table 8-3 lists the data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1.

Table 8-3. Data Transmission: SYSTEM-1 and SYSTEM-2

STATE

DIR CTRL

I/O-1

I/O-2

DESCRIPTION

Out

SYSTEM-1 data to SYSTEM-2.

Hi-Z

SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The

bus-line state depends on pullup or pulldown resistors.(1)

Hi-Z

DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or

pulldown resistors.(1)

Out

SYSTEM-2 data to SYSTEM-1.

(1)

SYSTEM-1 and SYSTEM-2 must use the same conditions, essentially, both pullup or both pulldown.

8.2.2.1 Design Requirements

Refer to Design Requirements.

8.2.2.2 Detailed Design Procedure

Refer to Detailed Design Procedure.

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SN74AXC1T45

SCES882E – DECEMBER 2017 – REVISED DECEMBER 2023

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