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GS-R4840NV 数据表(PDF) 2 Page - STMicroelectronics |
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GS-R4840NV 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 3 page ![]() 2/3 Package F. Dimensions in mm. (inches) CONNECTION DIAGRAM AND MECHANICAL DATA PIN DESCRIPTION Pin Function Description 1 -Vin Negative input voltage. 2 Inhibit/ Enable Remote Inhibit/Enable logically compatible with CMOS or open collector TTL. The converter is OFF (Inhibit) when this pin is unconnected or the voltage applied is in the range of 2 to 5V (referred to GND). The converter is ON (Enable) for a control voltage in the range of 0 to 0.8V maximum. 3 GND IN Return for input voltage source and +5V logic supply voltage. Internally connected to pin 15. 4 +5V IN +5V logic supply voltage. Maximum voltage must not exceed 7V. 5 DB0 Data bit 0 (LSB). 6 DB1 Data bit 1. 7 DB2 Data bit 2. 8 DB3 Data bit 3. 9 DB4 Data bit 4. 10 DB5 Data bit 5 (MSB). 11 CS Chip select. An active low input control which is the device enable input terminal. 12 WR Write control. An active low control which enables the microprocessor to write data to the DAC. 13 -Vout Negative output voltage. 14 FAULT FAULT indication output (referred to GND). The FAULT signal is high (TTL compatible level) when: - the INHIBIT is ON (high) - an output overload is present (Vo < 18V typ.) - an overtemperature is present - an overvoltage is present (Vo > Vo+5%) 15 GND OUT Return for output voltage source. Internally connected to pin 3. Note: Case internally connected to Ground. GS-R4840NV |
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