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SN74LVC1GU04DBVT 数据表(PDF) 13 Page - Texas Instruments

部件名 SN74LVC1GU04DBVT
功能描述  SN74LVC1GU04 Single Inverter Gate
PDF  49 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

SN74LVC1GU04DBVT 数据表(HTML) 13 Page - Texas Instruments

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SOLDER MASK
OPENING, TYP
METAL UNDER
SOLDER MASK,
TYP
8 mil
8 mil
0402
0.1 …F
Bypass
Capacitor
8 mil
WORST
BETTER
BEST
13
SN74LVC1GU04
www.ti.com
SCES215Y – APRIL 1999 – REVISED DECEMBER 2017
Product Folder Links: SN74LVC1GU04
Submit Documentation Feedback
Copyright © 1999–2017, Texas Instruments Incorporated
11 Layout
11.1 Layout Guidelines
Even low data rate digital signals can contain high-frequency signal components due to fast edge rates. When a
printed-circuit board (PCB) trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs
primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414
times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance
and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore
some traces must turn corners. Figure 7 shows progressively better techniques of rounding corners. Only the last
example (BEST) maintains constant trace width and minimizes reflections.
An example layout is given in Figure 8 for the DPW (X2SON-5) package. This example layout includes a 0402
(metric) capacitor and uses the measurements found in the example board layout appended to this end of this
datasheet. A via of diameter 0.1 mm (3.973 mil) is placed directly in the center of the device. This via can be
used to trace out the center pin connection through another board layer, or it can be left out of the layout
11.2 Layout Example
Figure 7. Trace Example
Figure 8. Example Layout With DPW (X2SON-5) Package



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