ICS853014

LOW SKEW, 1-TO-5, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER

IDT™ / ICS™ 2.5V, 3.3V LVPECL/ECL FANOUT BUFFER

2

ICS853014BG REV. DNOVEMBER 12, 2007

Table 1. Pin Descriptions

NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Number

Name

Type

Description

1, 2

Q0, Q0

Output

Differential output pair. LVPECL/ECL interface levels.

3, 4

Q1, Q1

Output

Differential output pair. LVPECL/ECL interface levels.

5, 6

Q2, Q2

Output

Differential output pair. LVPECL/ECL interface levels.

7, 8

Q3, Q3

Output

Differential output pair. LVPECL/ECL interface levels.

9, 10

Q4, Q4

Output

Differential output pair. LVPECL/ECL interface levels.

11

Power

Negative supply pin.

12

CLK_SEL

Input

Pulldown

Clock select input. When HIGH, selects PCLK1/PCLK1 inputs. When LOW,

selects PCLK0/PCLK0 inputs. LVTTL / LVCMOS interface levels.

13

PCLK0

Input

Pulldown

Non-inverting differential LVPECL clock input.

14

PCLK0

Input

Pullup/

Pulldown

15

Output

Bias voltage.

16

PCLK1

Input

Pulldown

Non-inverting differential LVPECL clock input.

17

PCLK1

Input

Pullup/

Pulldown

18, 20

Power

Positive supply pins.

19

EN

Input

Pulldown

Synchronizing clock enable. When LOW, clock outputs follow clock input.

When HIGH, Qx outputs are forced low, Qx outputs are forced high.

LVTTL/LVCMOS interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Input Pulldown Resistor

75

k

Ω

Pullup/Pulldown Resistors

50

k

Ω