0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0

0.2

0.4

0.6

0.8

1

=30

o

=90

o

=60

o

=120

o

= 180

o

180

O

I

(A)

T(RMS)

P(W)

Fig.1 : Maximum RMS power dissipation versus

RMS on-state current.

0

10 20 30 40 50 60 70 80 90 100 110 120 130

0

0.2

0.4

0.6

0.8

1

I

(A)

T(RMS)

= 180

o

Tlead( C)

o

Fig.3 : RMS on-state current versus case tempera-

ture.

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

Igt

Tj( C)

o

Ih

-40

-20

0

20

40

60

80

100

120 140

Igt[Tj]

Igt[Tj=25 C]

o

Ih[Tj]

Ih[Tj=25 C]

o

Fig.5 : Relative variation of gate trigger current and

holding current versus junction temperature.

0

204060

80

100

120

140

0

0.2

0.4

0.6

0.8

1-65

-75

-85

-95

-105

-115

-125

P(W)

Tamb ( C)

o

Tlead ( C)

o

Rth(j-l)

Rth(j-a)

Fig.2 : Correlation between maximum RMS power

dissipation and maximum allowable temperature

(Tamb and Tlead).

1E-3

1E-2

1E-1

1 E+0

1 E+1

1E +2 5 E+2

0.01

0.10

1.00

Zth(j-a)/Rth(j-a)

tp (s )

Fig.4 : Relative variation of thermal impedance

junction to ambient versus pulse duration.

1

10

100

1000

0

1

2

3

4

5

6

7

I

(A)

TSM

Tj in itial = 25 C

o

Number of cycles

Fig.6 : Non repetitive surge peak on-state current

versus number of cycles.

®

Z01xxxA

3/5