Application information

TSA1203

18/30

Figure 26. AC-coupled differential input

Figure 26 represents the biasing of a differential input signal in an AC-coupled differential

input configuration. Both inputs VIN and VINB are centered around the common mode

voltage, which can be left internal, or fixed externally.

Figure 27. DC-coupled 2 Vpp differential analog input

Figure 27 shows a DC-coupled configuration with forced VREFP and INCM to the 1V DC

analog input while VREFM is connected to ground; the differential amplitude obtained is

2Vpp.

8.4

Clock input

The quality of your TSA1203 converter is very dependent on your clock input accuracy, in

terms of aperture jitter; the use of a low jitter crystal controlled oscillator is recommended.

Further points to consider in your implementation are:

●

The duty cycle must be between 45% and 55%.

●

The clock power supplies must be independent from the ADC output supplies to avoid

digital noise modulation on the output.

●

When powered-on, the circuit needs several clock periods to reach its normal operating

conditions. Therefore, it is recommended to keep the circuit clocked to avoid random

states before applying the supply voltages.

50

Ω

10nF

TSA1203

VIN

VINB

INCM

33pF

100k

Ω

100k

Ω

50

Ω

10nF

common

mode

TSA1203

VIN

VINB

INCM

330pF

4.7µF

10nF

analog

DC

AC+DC

VREFP

VREFM

VREFP-VREFM = 1 V

DC

analog

VINCM = 0.5 V

Obsolete

Product(s)

- Obsolete

Product(s)