TPA3136D2 datasheet(4/41 Pages) TI2

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I/O/P(1)

DESCRIPTION

NAME

NO.

AGND

Analog signal ground.

GVDD

FET gate drive supply. Nominal voltage is 5 V.

PLIMIT

Power limiter level control. Connect a resistor divider from GVDD to GND to set power limit. Connect

directly to GVDD for no power limit.

RINN

Negative audio input for right channel. Biased at 2.5 V.

RINP

Positive audio input for right channel. Biased at 2.5 V.

MUTE

Mute signal for fast disable/enable of outputs (HIGH = outputs Hi-Z, LOW = outputs enabled). TTL

logic levels with compliance to AVCC.

PVCCR

Power supply for right channel H-bridge. Right channel and left channel power supply inputs are

connected internally.

BSPR

Bootstrap supply (BST) for positive high-side FET of the right channel.

OUTPR

Class-D H-bridge positive output for right channel.

PGND

Power ground for the H-bridges.

OUTNR

Class-D H-bridge negative output for right channel.

BSNR

Bootstrap supply (BST) for negative high-side FET of the right channel.

BSNL

Bootstrap supply (BST) for negative high-side FET of the left channel.

OUTNL

Class-D H-bridge negative output for left channel.

PGND

Power ground for the H-bridges.

Thermal Pad

Connect to GND for best thermal and electrical performance

(1)

I = Input, O = Output, IO = Input and Output, P = Power

TPA3139D2

SLOS810A – OCTOBER 2019 – REVISED AUGUST 2020

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