input or output of the device. These transients can exceed the Section 7.1 of the device if steps are not taken to

address the issue.

Typical methods for addressing transients include:

• Minimizing lead length and inductance into and out of the device

• Using large PCB GND plane

• Using a Schottky diode across the output and GND to absorb negative spikes

• Using low value ceramic capacitor (C(IN) to approximately 0.1 μF) to absorb the energy and dampen the

transients.

The approximate value of input capacitance can be estimated with Equation 10.

(

)

( )

(

)

( )

( )

IN

spike Absolute

IN

Load

IN

L

V

V

I

C

=

+

´

(10)

where

• V(IN) is the nominal supply voltage

• I(LOAD) is the load current

• L(IN) equals the effective inductance seen looking into the source

• C(IN) is the capacitance present at the input

Some applications can require additional Transient Voltage Suppressor (TVS) to prevent transients from

exceeding the Section 7.1 of the device. These transients can occur during positive and negative surge tests on

the supply lines. In such applications, TI recommends to place at least 1 µF of input capacitor.

The circuit implementation with optional protection components (a ceramic capacitor, TVS and Schottky diode) is

shown in Figure 10-10

TPS16633x

31 PŸ

IN

OUT

dVdT

ILIM

P_IN

RILIM

FLT

GND

SHDN

UVLO

OVP

MODE

IMON

PGOOD

Input

R2

R3

R1

COUT

CdVdT

*

Output

*

* Optional components needed for suppression of transients

Figure 10-10. Circuit Implementation With Optional Protection Components for TPS1663x

10.5 Layout

10.5.1 Layout Guidelines

• For all the applications, TI recommends a 0.1 µF or higher value ceramic decoupling capacitor between IN

terminal and GND.

• High current carrying power path connections must be as short as possible and must be sized to carry at

least twice the full-load current. See Figure 10-11 and Figure 10-12 for a typical PCB layout example.

• Locate all the TPS1663x family support components R(ILIM), R(PLIM), C(dVdT), R(IMON), UVLO, OVP resistors

close to their connection pin. Connect the other end of the component to the GND with shortest trace length.

www.ti.com

TPS1663

SLVSET9F – SEPTEMBER 2018 – REVISED FEBRUARY 2023

Copyright © 2023 Texas Instruments Incorporated

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Product Folder Links: TPS1663