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TPS16632RGET 数据表(PDF) 17 Page - Texas Instruments

部件名 TPS16632RGET
功能描述  TPS1663x 60-V, 6-A eFuse with Adjustable Output Power Limiting
PDF  46 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

TPS16632RGET 数据表(HTML) 17 Page - Texas Instruments

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VIN
VOUT
PGOOD
IIN
CdVdT = 100 nF
COUT = 1000 µF
RILIM = 4.02 kΩ
Figure 9-1. Hot Plug In and In-Rush Current Control at 24-V Input
9.3.1.1 Thermal Regulation Loop
The average power dissipation within the eFuse during power up with a capacitive load can be calculated using
Equation 3.
u
u
D(INRUSH)
(IN)
(INRUSH)
P
0.5 V
I
(3)
System designs requiring to charge large output capacitors rapidly can result in an operating point that exceeds
the power dissipation versus time boundary limits of the device defined by Figure 7-13 characteristic curve. This
event can result in increase in junction temperature beyond the device's maximum allowed junction temperature.
To keep the junction temperature within the operating range, the thermal regulation control loop regulates the
junction temperature at T(J_REG) , 145°C (typical) by controlling the inrush current profile and thereby limiting the
power dissipation within the device automatically. An internal 1.25 sec (typical), t(Treg_timeout) timer starts from
the instance the thermal regulation operation kicks in. If the output does not power up within this time then the
internal FET is turned OFF. Subsequent operation of the device depends on the MODE configuration (auto-retry
or latch OFF) setting as per the Table 9-1. The maximum time-out of 1.25 sec (typical) in thermal regulation loop
operation ensures that the device and the system board does not heat up during steady fault conditions such as
wake up with output short-circuit. This scheme ensures reliable power-up operation.
Thermal regulation control loop is internally enabled during power up by V(IN), UVLO cycling and turn ON using
SHDN control. Figure 9-2 illustrates performance of the device operating in thermal regulation loop during power
up by V(IN) with a large output capacitor. The thermal regulation loop gets disabled internally after the power up
sequence when the internal FET's gate gets fully enhanced or when the t(Treg_timeout) of 1.25 sec (typical) time is
elapsed.
www.ti.com
TPS1663
SLVSET9F – SEPTEMBER 2018 – REVISED FEBRUARY 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: TPS1663



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