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IP5320 数据表(PDF) 11 Page - Injoinic Technology Co.,Ltd. |
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IP5320 数据表(HTML) 11 Page - Injoinic Technology Co.,Ltd. |
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11 / 41 page  IP5389 V1.23 www.injoinic.com 11 / 41 Copyright © 2023, Injoinic Corp. 8 Internal Block Diagram of the Chip BST1 HG1 HG2 BUCK-BOOST Driver BUCK-BOOST Control VCC5V VCC5V CSN1 CSP1 CSP2 CSN2 CP1_5V CP2_5V VIN control DP/DM protocol VBUS control DP/DM protocol DRP Try.SRC VOUT1 control DP/DM protocol VOUT2 control DP/DM protocol VIN VIN_I VING DPB DMB VBUS VBUS_I VBUSG DPC DMC CC1 CC2 VOUT1 VOUT1_I VOUT1G DPA1 DMA1 VOUT2 VOUT2_I VOUT2G DPA2 DMA2 CP1_5V CP1_5V CP1_5V CP1_5V ADC VIN VIN_I VBUS VBUS_I VOUT1 VOUT1_I VOUT2 VOUT2_I CSP1 CSN1 CSP2 CSN2 CSP1 CSP2 NTC1 NTC2 FCAP VSET KEY_M ODE VIN VBUS PD Choose one of four CC1 CC2 DMB DP/DM fast charging, choose one of four DPB DMB DPC DMC DPA1 DMA1 DPA2 DMA2 BUCK VIO BAT LDO VIN VBUS VIO BAT LDO LDO LDO KEY WLED LX VCC5V VDD KEY VCCIO MTK LOSC HOSC Charge Pump 1 VIO CP1_5V Charge Pump 2 BAT CP2_5V MCU MTP RAM GPIO & MFP LED1 LED2 LED3 LED4 LED5 HLED BAT_S2 BAT_S1 FCAP VSET NTC_MODE NTC1 NTC2 NC IIC UART PWM TIMER CSP1 CSN1 LX1 LG1 LG2 LX2 BST2 PCON PCIN BAT VIO DRP Try.SRC CC3 CC4 LT Lightning Figure 3 Internal block diagram of the chip |
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