HCC/HCF4018B

PRESETTABLE DIVIDE-BY-N COUNTER

DESCRIPTION

.

MEDIUM SPEED OPERATION - 10MHz (typ.)

.

FULLY STATIC OPERATION

.

QUIESCENT CURRENT SPECIFIED TO 20V

FOR HCC DEVICE

.

STANDARDIZED

SYMMETRICAL

OUTPUT

CHARACTERISTICS

.

INPUT CURRENT OF 100nA AT 18V AND 25

°C

FOR HCC DEVICE

.

100% TESTED FOR QUIESCENT CURRENT

.

5V, 10V, AND 15V PARAMETRIC RATINGS

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MEETS ALL REQUIREMENTS OF JEDEC TEN-

TATIVE STANDARD N

o

13A, ”STANDARD

SPECIFICATIONS FOR DESCRIPTION OF ”B”

SERIES CMOS DEVICES”

June 1989

The HCC4018B (extended temperature range) and

HCF4018B (intermediate temperature range) are

monolithic integrated circuit, available in 16-lead

dual in-line plastic or ceramic package and plastic

micropackage.

The HCC/HCF4018B types consist of 5 Johnson-

Counter stages, buffered Q outputs from each

stage, and counter preset control gating. CLOCK,

RESET, DATA, PRESET ENABLE, and 5 individual

JAM inputs are provided. Divide by 10, 8, 6, 4, or 2

counter configurations can be implemented by feed-

ing the Q5, Q4, Q3, Q2, Q1 signals, respectively,

back to the DATA input.

Divide-by-9, 7, 5, or 3 counter configurations can be

implemented by the use of a HCC/HCF4011B gate

package to properly gate the feedback connection

to the DATA input. Divide-by-functions greater than

10 can be achieved by use of multiple HCC/HCF

4018B units. The counter is advanced one count at

the positive clock-signal transition. Schmitt Trigger

action on the clock line permits unlimited clock rise

and fall times. A high RESET signal clears the

counter to an all-zero condition. A high PRESENT-

ENABLE signal allows information on the JAM in-

puts to preset the counter. Anti-lock gating is

provided to assure the proper counting sequence.

EY

(Plastic Package)

F

(Ceramic Frit Seal Package)

C1

(Plastic Chip Carrier)

ORDER CODES :

HCC4018BF

HCF4018BM1

HCF4018BEY

HCF4018BC1

PIN CONNECTIONS

M1

(Micro Package)

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