APPLICATIONS

Conversion of Clock up, Clock Down Input Sig-

nals to Clock and Up/Down Inputs Signals.

Cascading Counter Packages.

The HCC/HCF4029B CLOCK and UP/DOWN in-

puts are used directly in most applications. In appli-

cations where CLOCK UP and CLOCK DOWN

inputs

are

provided,

conversion

to

the

HCC/HCF4029B CLOCK and UP/DOWN inputs

can easily be realized by use of the circuit.

HCC/HCF4029B changes count on positive transi-

tions of CLOCK UP or CLOCK DOWN inputs. For

the gate configuration shown below, when counting

up the CLOCK DOWN input must be maintained

high and conversely when counting down the

CLOCK UP input must be maintained high.

*

CARRY-OUT lines at the 2nd, 3rd, et., stages may have a negative-going glitch pulse resulting from differential delays of different

HCC/HCF4029B IC’s. These negative-going glitches do not affect proper HCC/HCF4029B operation. However, if the CARRY-OUT signals

are used to trigger other edge-sensitive logic devices, such as FF’s or counters, the CARRY-OUT signals should be gated with the clock signal

using a 2-input NOR gate such as HCC/HCF4001B.

Ripple Clocking Mode : The Up/Down control can be changed at any count. The only restriction on changing the Up/Down control is that the

clock input to the first counting stage must be high.

HCC/HCF4029B

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