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TPS73233DBVR 数据表(PDF) 24 Page - Texas Instruments |
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TPS73233DBVR 数据表(HTML) 24 Page - Texas Instruments |
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24 / 47 page ![]() 7.4.1.1.1 Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are shown in the Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves the heat-sink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current times the voltage drop across the output pass transistor (VIN to VOUT): D IN OUT OUT P (V V ) I = - ´ (6) Power dissipation is minimized by using the lowest possible input voltage necessary to provide the required output voltage. 7.4.2 Layout Examples NR/FB EN 1 2 3 4 8 7 6 5 GND PLANE GND PLANE CIN COUT C NR N/C N/C N/C VOUT VIN TPS736xxDRB Figure 7-11. Fixed Output Voltage Option Layout (DRB Package) TPS732 SBVS037R – AUGUST 2003 – REVISED MAY 2025 www.ti.com 24 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TPS732 |
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