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HCC4094B 数据表(PDF) 4 Page - STMicroelectronics |
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HCC4094B 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 14 page ![]() TRUTH TABLE TRUTH TABLE Parallel Outputs Seri al Outputs CL∆ Outputs Enabl e Strobe D ata Q1 QN Q S * Q’ S – / – 0X X OC OC Q7 NC –\ – 0X X OC OC NC Q7 – / – 1 0 X NCNCQ7 NC – / – 11 0 0 QN-1 Q7 NC – / – 11 1 1 QN-1 Q7 NC –\ – 1 1 1 NCNCNCQ7 v = Level Change Logic 1 ≡ High X = Don’t Care Logic 0 ≡ Low NC = No Change OC = Open Circuit * At the positive clock edge information in the 7th shift register stage is transferred to the 8th register stage and the QS output. HCC/HCF4094B 4/14 |
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