 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
NRF51822-CFAC-R7 数据表(PDF) 59 Page - Nordic Semiconductor |
|
|
|||||||||||||||||||||||||||||
NRF51822-CFAC-R7 数据表(HTML) 59 Page - Nordic Semiconductor |
|
|
59 / 130 page  Page 59 nRF51822 Product Specification v3.3 8.10 I2C compatible Two Wire Interface (TWI) specifications Table 48 TWI specifications Figure 14 SCL/SDA timing Table 49 TWI timing parameters Symbol Description Note Min. Typ. Max. Units Test level I2W100K Run current for TWI at 100 kbps. 380 μA 1 I2W400K Run current for TWI at 400 kbps. 400 μA 1 f2W Bit rates for TWI. 100 400 kbps N/A tTWI,START Time from STARTRX/STARTTX task is given until start condition. Low power mode.1 Constant latency mode.1 1. For more information on how to control the sub power modes, see the nRF51 Series Reference Manual. 3 1 4.4 μs 1 Symbol Description Standard Min. Max. Fast Min. Max. Units Test level fSCL SCL clock frequency. 100 400 kHz 1 tHD_STA Hold time for START and repeated START condition. 5200 1300 ns 1 tSU_DAT Data setup time before positive edge on SCL. 300 300 ns 1 tHD_DAT Data hold time after negative edge on SCL. 300 300 ns 1 tSU_STO Setup time from SCL goes high to STOP condition. 5200 1300 ns 1 tBUF Bus free time between STOP and START conditions. 4700 1300 ns 1 1/fSCL SCL SDA tHD_SDA tSU_DAT tHD_DAT tBUF tSU_STO |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
