HCF4541B

6/10

DIGITAL TIMER APPLICATION

A positive MASTER RESET pulse clears the

counter and latch. The Output goes high and

keeps up till the number of pulses, selected by A

and B , are counted. This circuit is retriggerable

and is as accurate as the input frequency. If a

more accurate circuit is desired, an external clock

can be used on pin 3. A set-up time equal to the

width

of

the

one

shot

output

is

required

immediately following initial power up, during

which time the output will be high

Symbol

Parameter

Test Condition

Value (*)

Unit

Min.

Typ.

Max.

Propagation Delay Time

(CLOCK to Q)

5

3.5

10.5

µs

10

1.25

3.8

15

0.9

2.9

Propagation Delay Time

(CLOCK to Q)

56

18

µs

10

3.5

10

15

2.5

7.5

Transition Time

5

100

200

ns

10

50

100

15

40

80

Transition Time

5

180

360

ns

10

90

180

15

65

130

Master Reset, Clock Pulse

Width

5

900

300

ns

10

300

100

15

225

85

Maximum Clock Pulse

Input Frequency

51.5

MHz

10

4

15

6

Maximum Clock Pulse

Input Rise or Fall Time

5

Unlimited

µs

10

15