EXTERNAL COMPONENT LIST FOR THE LINE INTERFACE

Pin

Component

Involved Parameter or Function

Ref.

Value

L3000S

10

RREF

24.9k

Ω ± 1%

Bias Resistance

1,15

RP

30 to 100

Ω

Line Series Resistor

7

CDVB

47

µF – 20V

Battery Voltage Rejection

3

CVB+

0.1

µF – 100V (1)

Positive Battery Filter

8

CVB–

0.1

µF – 100V (2)

Negative Battery Filter

8

D1

BAT 49X

Protective Shottky Diode

L3030 (PLCC44)

4-3

CVSS

0.1

µF – 15V

Negative Supply Voltage Filter

5-3

CVDD

0.1

µF – 15V

Positive Supply Voltage Filter

7-8

RR

16K

Ω (range: 10 to 50KΩ)

Capacitor Multiplier Gain (8)

15-17

RDC

2 x (RFS – RP1)

DC Feeding Resistor (RDC > 270

Ω)

7-15

CAC1 (3)

1

6.28

AC Path decoupling

14-15

CAC2

CAC1

8-9

ZAC

ZML – (RP1 + RP2)

2 Wire AC impedance

8-9

CCOMP

1/(6.28 x 150000 x (RPC))

AC loop compensation

9-14

RPC

RP1 + RP2

Rp insertion loss compensation

2-3

RREF

24.9K

Ω 1%

Bias Resistance

36-3

ZB

K x Zline (note 4)

Line Impedance Balancing Network

36-41

ZL

K x RPC in Series with

K x ZAC // (CCOMP/K)

SLIC Impedance Balancing Network (note 5)

32-3

CINT

(note 6)

Ring trip detection time constant

15-16

Ccon

0.15

µF (note 7)

Interface Time Constant

35

TTx FILT.

Ω 1% in speech band

≈ 0Ω at TTX freq. (note 9)

Teletax filter.

34

10k

Ω 1%

Teletax filter.

Notes :

1. In case l ine cards wi th less than 7 subscri bers are i mplemented CVB – capaci tor should be equal to 680nF/N where

N i s the number of subscri ber per car d.

2. This shot tky diode or equivalent is necessar y to avoid to damage to t he devi ce dur ing hot insertion or in all t hose

cases when a proper power up sequence cannot be guaranteed.

In case the shottky di ode i s not impl emented the power sequence shoul d guarantee that V B+ is always the last

supply appl ied at pow er on and t he fi rst removed at power off.

In case an ot her shot tky diode type i s adopted it must fulf il l the foll owing character isti cs:

Where n i s the number of line shari ng the same diode.

3. If the internal capacit y mul tipli er stage i s not used, pin 7 must be connect ed w ith pin 14 without mounting R R and

CAC 2. In thi s case C AC1 = 1/(6.28 x 30 x RD C).

4. The str ucture of thi s network shall copy the line impedance, in case mul tiplied by a factor K = 1....10

5. K as fixed at note 4.

6. CINT can have the f ollowi ng values :

7. Ccon is necessary to w ork ”w it hout on/off hook det ection- error s” during T TX-pul ses.

8. RR is used by a capaci tor multiplier ci rcuit to synthetize an hi gher AC /DC split ting capacit or st arti ng from CA C1

and CAC 2. Supposi ng CAC1 = CAC2 = CA C the synt heti zed capacitor value will be equal

RR

+ ZML

ZML

⋅ CAC .

9. If Te letax is not used t he T TX F ILT. can be r eplaced by a 1k

Ω resistor.

Fr. (Hz)

16/18

18/21

21/26

26/31

31/38

38/46

46/57

57/66

CINT (nF)

560

470

390

330

270

220

180

150

L3000S - L3030

16/29