MP4078

– PSR OFFLINE CONTROLLER WITH PFC

MP4078 Rev. 1.0

www.MonolithicPower.com

16

7/21/2020

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© 2020 MPS. All Rights Reserved.

To regulate the output, all information regarding

the output voltage must be accurately sensed.

The plateau voltage of the auxiliary winding is

proportional to the output voltage while D1

conducts, so this value can be used to indicate

the output voltage. The MP4078 monitors this

signal on the ZCD pin through a resistor divider.

Because the auxiliary winding voltage is not

stable or constant, it requires a sample hold

circuit to generate a feedback voltage (VFB) that

is equal to the sensed plateau voltage. VFB

represents the output voltage, and is regulated

by the internal reference (VREF). Calculate the

ZCD resistor divider ratio with Equation (1):











ZCD1

ZCD2

AUX

REF

O

DIODE

ZCD2

S

R

R

N

V

(V

V

)

RN

(1)

Where RZCD1 and RZCD2 are external resistor

dividers around the ZCD pin, VO is the output

voltage, VDIODE is the forward voltage drop of the

rectified diode (D1), NAUX is the number of turns

on the auxiliary winding for VCC, and NS is the

number of turns on the secondary winding for the

output.

Because of the parasitic capacitance and

inductance in circuits, switching spikes inevitably

exist on the windings when Q1 turns off. This

affects the sensing accuracy on the ZCD pin

without

any

blanking

time

delay.

It

also

inaccurately senses the plateau voltage with a

long blanking time delay, since the D1 current

drops

to

zero

(especially

under

light-load

conditions).

The MP4078 has an internal variable delay time

for ZCD sensing (tZCD_DELAY). Its value depends

on the peak voltage (VCS) on the S pin (the

source

of

the

internal

MOSFET),

which

represents the load condition. Under heavy-load

conditions (VCS > 0.3V), tZCD_DELAY is set to about

1.79

μs. Under light-load conditions (VCS ≤ 0.3V),

tZCD_DELAY is adjusted to about 1.16μs.

Figure 5 shows the ZCD sensing delay time.

VZCD

0V

tZCD_DELAY when VCS > 0.3V

tZCD_DELAY when

VCS

0.3V

VFB Detection

Figure 5: ZCD Sensing Delay Time

Constant-On-Time (COT) Operation

To achieve a high power factor under universal

input, the MP4078 adopts constant-on-time

(COT) control.

Figure 6 shows the internal on-time generation

block diagram.

EMI

Filter

Driver

MULT

VMULT

VCOMP

+

-

Reset

R

S

Q

Transient_Low

UVLO

Peak

Voltage

Detection

RMULT

RMULT_UP

tON

COMP

VCOMP

In Transient_Low Condition,

tON = tON_NORMAL x 1.5

VCOMP_HALF

VCOMPH

Reset

VCOMP_HALF

Q

Figure 6: On-Time Generation

In normal operation, the peak voltage on the

MULT pin (VMULT) represents the input voltage,

which is converted to a charge current. This

current charges the slew rate capacitor once the

external MOSFET turns on and makes the

voltage on the capacitor increase linearly. The

voltage on the slew rate capacitor is compared

to the output of the error amplifier (VCOMP) for

feedback to determine the turn-off time for both

the internal and external MOSFETs. When the

output load decreases, VCOMP drops accordingly.

As

an

input

of

the

on-time

generation

comparator, the value is maintained at a certain

voltage (VCOMP_HALF) when VCOMP drops below

VCOMP_HALF. That means the on time does not

decrease

with

a

constant

input

voltage.

However, it does achieve COT in a sinusoidal

period with the whole output load range.