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STM32L433CCU6 数据表(PDF) 26 Page - STMicroelectronics

部件名 STM32L433CCU6
功能描述  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 256KB flash, 64KB SRAM, USB FS, LCD, ext. SMPS
PDF  227 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32L433CCU6 数据表(HTML) 26 Page - STMicroelectronics

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Standby
LPR
Power
ed Off
Off
SRAM
2 ON
LSE
LSI
BOR, RTC, IWDG
***
All other peripherals are
powered off.
***
I/O configuration can be
floating, pull-up or pull-down
Reset pin
5 I/Os (WKUPx)(13)
BOR, RTC, IWDG
0.20 µA w/o RTC
0.46 µA w/ RTC
12.2 µs
OFF
Power
ed
Off
0.03 µA w/o RTC
0.29 µA w/ RTC
Shutdown
OFF
Power
ed Off
Off
Power
ed
Off
LSE
RTC
***
All other peripherals are
powered off.
***
I/O configuration can be
floating, pull-up or pull-
down(14)
Reset pin
5 I/Os (WKUPx)(14)
RTC
0.01 µA w/o RTC
0.20 µA w/ RTC
262 µs
1. LPR means Main regulator is OFF and Low-power regulator is ON.
2. All peripherals can be active or clock gated to save power consumption.
3. Typical current at VDD = 1.8 V, 25°C. Consumptions values provided running from SRAM, flash memory Off, 80 MHz in Range 1, 26 MHz in Range 2, 2 MHz in
LPRun/LPSleep.
4. The flash memory can be put in power-down and its clock can be gated off when executing from SRAM.
5. Theoretical value based on VDD = 3.3 V, DC/DC Efficiency of 85%, VCORE = 1.10 V
6. Theoretical value based on VDD = 3.3 V, DC/DC Efficiency of 85%, VCORE = 1.05 V
7. The SRAM1 and SRAM2 clocks can be gated on or off independently.
8. SMPS mode can be used in STOP0 Mode, but no significant power gain can be expected.
9. U(S)ART and LPUART reception is functional in Stop mode, and generates a wakeup interrupt on Start, address match or received frame event.
10. I2C address detection is functional in Stop mode, and generates a wakeup interrupt in case of address match.
11. USB_FS wakeup by resume from suspend and attach detection protocol event.
12. SWPMI1 wakeup by resume from suspend.
13. The I/Os with wakeup from Standby/Shutdown capability are: PA0, PC13, PE6, PA2, PC5.
14. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode but the configuration is lost when exiting the Shutdown mode.
Table 4. STM32L433xx modes overview (continued)
Mode
Regulator(1)
CPU Flash SRAM Clocks
DMA and Peripherals(2)
Wakeup source
Consumption(3)
Wakeup time



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