STM32L433CBI6P datasheet(20/227 Pages) STMICROELECTRONICS

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Functional overview

STM32L433xx

20/227

DS11449 Rev 7

The boot loader is located in system memory. It is used to reprogram the flash memory by

using USART, I2C, SPI, CAN or USB FS in Device mode through DFU (device firmware

upgrade).

BOOT0 value may come from the PH3-BOOT0 pin or from an option bit depending on the

value of a user option bit to free the GPIO pad if needed.

An empty check mechanism is implemented to force the boot from system flash if the first

memory location is not programmed and if the boot selection is configured to boot from main

flash. If the boot selection uses BOOT0 pin to boot from the main flash memory, but the first

flash memory location is found empty, the flash empty check mechanism forces boot from

the system memory (containing embedded bootloader). Then due to bootloader activation,

some of the GPIOs are reconfigured from the High-Z state. Please refer to AN2606 for more

details concerning the bootloader and GPIOs configuration in system memory boot mode.

It is possible to disable this feature by configuring the option bytes (instead of BOOT0 pin) to

force boot from the main flash memory (nSWBOOT0 = 0, nBOOT0 = 1).

3.8

Cyclic redundancy check calculation unit (CRC)

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at link-

time and stored at a given memory location.

3.9

Power supply management

3.9.1

Power supply schemes

•

VDD = 1.71 to 3.6 V: external power supply for I/Os (VDDIO1), the internal regulator and

the system analog such as reset, power management and internal clocks. It is provided

externally through VDD pins.

•

VDD12 = 1.05 to 1.32 V: external power supply bypassing internal regulator when

connected to an external SMPS. It is provided externally through VDD12 pins and only

available on packages with the external SMPS supply option. VDD12 does not require

any external decoupling capacitance and cannot support any external load.

•

VDDA = 1.62 V (ADCs/COMPs) / 1.8 (DAC/OPAMP) to 3.6 V: external analog power

supply for ADCs, DAC, OPAMPs, Comparators and Voltage reference buffer. The VDDA

voltage level is independent from the VDD voltage.

•

VDDUSB = 3.0 to 3.6 V: external independent power supply for USB transceivers. The

VDDUSB voltage level is independent from the VDD voltage.

•

VLCD = 2.5 to 3.6 V: the LCD controller can be powered either externally through VLCD

pin, or internally from an internal voltage generated by the embedded step-up

converter.

•

VBAT = 1.55 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and

backup registers (through power switch) when VDD is not present.

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