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RF2369
Rev B3 DS070816
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Package Drawing
Pin
Function
Description
Interface Schematic
1VREF/PD
For low noise amplifier applications, this pin is used to control the bias cur-
rent. An external resistor can be used to set the bias current for any VPD
voltage.
2GND1
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
3RF IN
RF input pin.
4RF OUT
Amplifier output pin. This pin is an open-collector output. It must be biased
to VCC through a choke or matching inductor. This pin is typically matched
to 50
Ω with a shunt bias/matching inductor and series blocking/matching
capacitor. Refer to application schematics.
5GND2
LNA emittance inductance. Total inductance is comprised of
package+bondwire+stripline (L1) on PCB.
6
SELECT
This pin selects high gain and bypass.
Select < 0.8V, high gain.
Select > 1.8V, low gain.
VREF/PD
RF IN
RF OUT
To Bias
Circuit
0.10
MAX.
0.90
0.70
1.30
1.00
1.90
3.10
2.70
0.50
0.35
3.00
2.60
1.80
1.40
9°
1°
0.25
0.10
0.37 MIN.
Shaded lead is pin 1.
Dimensions in mm.
*When Pin 1 is in upper left,
text reads downward
(as shown).