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TAS5802PWPR 数据表(PDF) 49 Page - Texas Instruments

部件名 TAS5802PWPR
功能描述  TAS5802 22W Stereo, Inductor-Less, Digital Input, Closed-Loop Class-D Audio Amplifier with 96Khz Extended Processing and Low Idle Power Dissipation
PDF  106 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

TAS5802PWPR 数据表(HTML) 49 Page - Texas Instruments

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7.1.9 SAP_CTRL1 Register (Offset = 33h) [Reset = 02h]
SAP_CTRL1 is shown in Figure 7-9 and described in Table 7-11.
Return to the Summary Table.
I2S control 1
Figure 7-9. SAP_CTRL1 Register
7
6
5
4
3
2
1
0
SHIFT_MSB
RESERVED
DATA_FMT
LRCLK_PULSE
FRAME_LENGTH
R/W-0h
R/W-0h
R/W-0h
R/W-0h
R/W-2h
Table 7-11. SAP_CTRL1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
SHIFT_MSB
R/W
0h
I2S Shift MSB. Combine with the 8 bits in low register 34h.
6
RESERVED
R/W
0h
5-4
DATA_FMT
R/W
0h
I2S Data Format
These bits control both input and output audio interface formats for
DAC operation.
00: I2S
01: DSP/TDM
10: RTJ
11: LTJ
3-2
LRCLK_PULSE
R/W
0h
If the LRCLK pulse is shorter than 8 x BCLK, set bit 0-1 to '01'
Otherwise, keep these bits as default value '00'
00: High width of LRCLK pulse is equal or greater than 8 cycles
of BCLK
01: High width of LRCLK pulse is less than 8 cycles of BCLK
1-0
FRAME_LENGTH
R/W
2h
I2S Word Length
These bits control both input and output audio interface sample word
lengths for DAC operation.
00: 16 bits
01: 20 bits
10: 24 bits
11: 32 bits
www.ti.com
TAS5802
SLASFB7A – NOVEMBER 2024 – REVISED AUGUST 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: TAS5802



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