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L6213 数据表(PDF) 4 Page - STMicroelectronics

部件名 L6213
功能描述  SOLENOID DRIVER SWITCH MODE POWER SUPPLY
PDF  9 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6213 数据表(HTML) 4 Page - STMicroelectronics

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PIN DESCRIPTION
Nr.
Name
Description
1
Out-Up
Solenoid section upper DMOS output.
2
BSE
Solenoid section upper DMOS bootstrap. A capacitor connected between pin 2 and pin 1
ensures the efficient driving of the solenoid section upper DMOS.
3
ENABLE
Solenoid control input - TTL compatible.
4+VS1
Unregulated voltage input - Solenoid section.
5, 6
GND
Ground.
7
PF
Power fail output, the saturation of PF is guaranteed if VPS exceed 3V. PF is at logic 1 a
time T1 after RESET reached the high level. PF came back to logic 0 when VPS goes
down under 18V. (see fig. 1)
8
PFP
Power fail programming. A resistor divider connected to VPS changes the Power fail
threshold levels.
9
CD
Capacitor delay. A capacitor connected to this pin determines the Reset signal delay time
td.
10
VS2
Unregulated voltage input - SMPS sections.
11
VD
Regulator output and diode voltage control.
12
BSA
SMPS section DMOS bootstrap. A capacitor connected between pin 12 and pin 11
ensures efficient driving of SMPS DMOS.
13
RESET
Reset output. The saturation of Reset is guaranteed if VPS exceeds 3V. The Reset output
reaches the logic level 1 a time delay (set by capacitor CD) after VPS has reached a
rising threshold voltage. Reset reaches 0 level when VPS goes down below folling
threshold.
14
Vout
Feed back input of the regulation loop.
15, 16
GND
Ground.
17
Rsense
Connection for solenoid sensing resistor.
18
PIM
Programming of solenoid current rising edge. An RC network connected to this pin
determines the slope of the solenoid current rising edge.
19
ISTP
Programming of solenoid current histeresys.
20
Out-Down
Solenoid section lower DMOS output.
ELECTRICAL CHARACTERISTICS (Refer to the application circuit, TJ =25
°C, Iout Power Supply =
50mA, VPS from 12V to 46V; unless otherwise specified.
Pin
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
STEP-DOWN SECTION
10, 4
Vi
Supply Voltage
14
46
V
14
Vo
Output Voltage
IO = 0.05 to 1A
4.85
5.2
V
RDS on
On State Drain Resistance
TJ =25
°C; VPS = 15 to 46V
0.56
0.7
10
thon
Turn-on Threshold
VPS Rising Fig. 1
10
12
V
10
th off
Turn-off Threshold
VPS Falling Fig. 1
10
12
V
10
IB
Input Bias Current
15
mA
11
Ilim
Static Current Limiting
2.2
3.4
A
2, 10
Ii
Total Input Current
ENABLE = 1, VPS = 46V,
Iload =0
13
mA
2, 10
Ii
Total Input Current
ENABLE = 1, VPS = 15V,
Iload =0
18
mA
11
tdp
Protection Current Maximum
Delay Time
1
µs
toff
Minimum Power off State
VPS = 46V IO = 50mA
4.2
7.8
µs
L6213
4/9



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