ABL Gain Reduction

The ABL function reduces the contrast level of the LM1237 as the voltage on pin 22 is lowered from V

8 shows the amount of gain reduction as the voltage is lowered from V

reaches the knee anound 3.7V, where the slope increases. Many system designs will require about 3 to 5 dB of gain reduction

in full beam limiting. Additional attenuation is possible, and can be used in special circumstances. However, in this case, video

performance such as video linearity and tracking between channels will tend to depart from normal specifications.

OSD Phase Locked Loop

Table 3. OSD Register recommendations shows the recommended horizontal scan rate ranges (in kHz) for each combination of

PLL register setting, 0x843E [1:0], and the pixels per line register setting, 0x8401 [7:5]. These ranges are recommended for chip

these ranges, the performance of the loop will be improved if these recommendations are followed. NR means the combination

of PLL and PPL is not recommended for any scan rate.

TABLE 3. OSD Register recommendations

PPL=0

PPL=1

PPL=2

PPL=3

PPL=4

PPL=5

PPL=6

PPL=7

PLL=1

27 - 57

26 - 49

25 - 45

25 - 41

25 - 37

25 - 34

25 - 32

25 - 30

PLL=2

NR

NR

45 - 89

41 - 82

37 - 75

34 - 69

32 - 64

30 - 60

PLL=3

NR

NR

NR

82 - 110

75 - 110

69 - 110

64 - 110

60 - 110

20023460

FIGURE 8. ABL Gain Reduction Curve

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