AD822ARM-R2 datasheet(20/28 Pages) AD

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AD822

Rev. G | Page 20 of 28

APPLICATION NOTES

INPUT CHARACTERISTICS

In the AD822, n-channel JFETs are used to provide a low offset,

low noise, high impedance input stage. Minimum input

common-mode voltage extends from 0.2 V below −VS to 1 V

less than +VS. Driving the input voltage closer to the positive

rail causes a loss of amplifier bandwidth (as can be seen by

comparing the large signal responses shown in Figure 34 and

Figure 37) and increased common-mode voltage error as

illustrated in Figure 20.

The AD822 does not exhibit phase reversal for input voltages up

to and including +VS. Figure 42 shows the response of an

AD822 voltage follower to a 0 V to 5 V (+VS) square wave input.

The input and output are superimposed. The output tracks the

input up to +VS without phase reversal. The reduced bandwidth

above a 4 V input causes the rounding of the output waveform.

For input voltages greater than +VS, a resistor in series with the

AD822’s noninverting input prevents phase reversal, at the

expense of greater input voltage noise. This is illustrated in

Figure 42.

Since the input stage uses n-channel JFETs, input current

during normal operation is negative; the current flows out from

the input terminals. If the input voltage is driven more positive

than +VS – 0.4 V, then the input current reverses direction as

internal device junctions become forward biased. This is

illustrated in Figure 7.

A current limiting resistor should be used in series with the

input of the AD822 if there is a possibility of the input voltage

exceeding the positive supply by more than 300 mV, or if an

input voltage is applied to the AD822 when ±VS = 0. The

amplifier is damaged if left in that condition for more than

10 seconds. A 1 kΩ resistor allows the amplifier to withstand up

to 10 V of continuous overvoltage and increases the input

voltage noise by a negligible amount.

Input voltages less than –VS are a completely different story. The

amplifier can safely withstand input voltages 20 V below the

negative supply voltage as long as the total voltage from the

positive supply to the input terminal is less than 36 V. In

addition, the input stage typically maintains picoampere (pA)

level input currents across that input voltage range.

The AD822 is designed for 13 nV/√Hz wideband input voltage

noise and maintains low noise performance to low frequencies

(refer to Figure 14). This noise performance, along with the

AD822’s low input current and current noise, means that the

AD822 contributes negligible noise for applications with source

resistances greater than 10 kΩ and signal bandwidths greater

than 1 kHz. This is illustrated in Figure 43.

100k

0.1

10k

100

WHENEVER JOHNSON NOISE IS GREATER THAN

AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE

CONSIDERED NEGLIGIBLE FOR APPLICATION.

1kHz

AMPLIFIER-GENERATED

NOISE

10Hz

10k

100k

10M

100M

10G

SOURCE IMPEDANCE (Ω)

RESISTOR JOHNSON

NOISE

Figure 43. Total Noise vs. Source Impedance

OUTPUT CHARACTERISTICS

The AD822’s unique bipolar rail-to-rail output stage swings within

5 mV of the negative supply and 10 mV of the positive supply with

no external resistive load. The AD822’s approximate output

saturation resistance is 40 Ω sourcing and 20 Ω sinking. This can be

used to estimate output saturation voltage when driving heavier

current loads. For instance, when sourcing 5 mA, the saturation

voltage to the positive supply rail is 200 mV; when sinking 5 mA,

the saturation voltage to the negative rail is 100 mV.

The amplifier’s open-loop gain characteristic changes as a

function of resistive load, as shown in Figure 10 to Figure 13.

For load resistances over 20 kΩ, the AD822’s input error voltage

is virtually unchanged until the output voltage is driven to

180 mV of either supply.

If the AD822’s output is overdriven so as to saturate either of

the output devices, the amplifier recovers within 2 μs of its

input returning to the amplifier’s linear operating region.

Direct capacitive loads interact with the amplifier’s effective

output impedance to form an additional pole in the amplifier’s

feedback loop, which can cause excessive peaking on the pulse

response or loss of stability. Worst case is when the amplifier is

used as a unity gain follower. Figure 44 shows the AD822’s pulse

response as a unity gain follower driving 350 pF. This amount of

overshoot indicates approximately 20° of phase margin—the

system is stable, but nearing the edge. Configurations with less

loop gain, and as a result less loop bandwidth, are much less

sensitive to capacitance load effects.

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