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25CS160-E/MS 数据表(PDF) 20 Page - Microchip Technology

部件名 25CS160-E/MS
功能描述  16-Kbit SPI Serial EEPROM with 128-Bit Serial Number
PDF  53 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

25CS160-E/MS 数据表(HTML) 20 Page - Microchip Technology

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 2026 Microchip Technology Inc. and its subsidiaries
Preliminary
DS20007008B-page 20
25CS160
6.1.2
BLOCK WRITE-PROTECT BITS
The 25CS160 contains four levels of EEPROM write
protection using the Block Protection function. The
nonvolatile Block Write-Protect bits (BP1, BP0) are
located in bits three and two of the first STATUS
register byte and define the region of the EEPROM and
Security register that is to be treated as read-only.
The four levels of array protection are:
• Level 0: No portion of the EEPROM is protected,
while the lower 32 bytes of the Security register
are read-only.
• Level 1: The upper quarter address range is
write-protected, meaning the highest order 4 Kbits
in the EEPROM are read-only. The lower 32 bytes
of the Security register are read-only.
• Level 2: The upper half address range is
write-protected, meaning the highest order 8 Kbits
in the EEPROM are read-only. The lower 32 bytes
of the Security register are read-only.
• Level 3: Both the EEPROM and Security register
are write-protected, meaning all addresses are
read-only.
The address ranges that are protected for each Block
Write Protection level and corresponding STATUS
register control bits are shown in Table 6-2.
TABLE 6-2:
BLOCK WRITE-PROTECT BITS
Level
STATUS Register Byte 0
Bits [3:2]
Protected Address Range
BP1
BP0
Memory Region
25CS160
0
00
EEPROM
None
Security Register
0000h-001Fh
1
01
EEPROM
0600h-07FFh
Security Register
0000h-001Fh
2
10
EEPROM
0400h-07FFh
Security Register
0000h-001Fh
3
11
EEPROM
0000h-07FFh
Security Register
0000h-003Fh



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