FUNCTIONAL DESCRIPTION

The VCM Driver is controlled via two control sig-

nals, ENABLE, POWER ON RESET. An analog

input voltage, ERROR AMP IN, controls the polar-

ity and amplitude of the VCM driving current.

Refer to figure two. This diagram is a repre-

sentation of the function of the VCM System.

Note that the signals with the bars represent the

"not

true", or "non asserted" condition. From in-

itial power up, the system is held in the Park

Mode. Upon completion of the POWER UP RE-

SET DELAY the machine moves to Tristate Mode

or Run Mode, depending upon the condition of

the ENABLE input. If ENABLE is asserted, the

machine moves directly to Run Mode. If ENABLE

is not asserted, the machine moves to Tristate

Mode.

POWER ON RESET is an asynchronous output.

Additionally it affects the internal logic as a hard

wired reset and therefore if a supply failure occurs

during Tristate or Run state, the machine moves

directly back to the Park Mode.

While in Tristate Mode, the assertion of ENABLE

will move the machine to the Run Mode. Run

Mode will typically be the steady running state.

The deassertion of the ENABLE signal causes

the machine to move into Tristate. If it is desired

to perform an active Parking function, the PARK

input must be driven low by the external hard-

ware, or the the VCM can be driven to the Park

position via the ERROR AMP IN control voltage

BLOCK DESCRIPTION

OUTPUT STAGE

It consists of two Power Op Amps connected in

bridge configuration.

CURRENT SENSE AMPLIFIER

Differential amplifier whose inputs are connected

to the sense lines and whose output is accessible

externally. Closing the loop will transform the

differential voltage signal from the sense lines into

a current signal for the Error Amplifier.

ERROR AMPLIFIER

Error amplifier which drives the output stage. The

input and the output pins are accessible exter-

nally.

POWER SUPPLY MONITOR OPERATION

The circuit monitors the logic supply voltage input

(typ 5V) and activates Power on Reset output

when such a supply drops below the safe operat-

ing limit. After the logic supply voltage reaches its

nominal value a delay capacitor has to be

charged [Tdelay = 3x2x10e5 x C sec] before

Power on Reset output change from low to high

level. Falling edges of Power on Reset are de-

layed (typ 4

µs) in order to disable the writing on

the disk before the Power on Reset is activated.

An additional supervisor circuit is present in the

ELECTRICAL CHARACTERISTICS (continued)

MONITORS AND CONTROL CIRCUIT

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

Threshold Voltage at Logic

Supply Sense

4.2

4.5

V

Threshold Voltage at Power Fail

Threshold Input

1.375

1.4

1.435

V

Hysteresis on Vt2

50

mV

Hysteresis on Vt2

15

mV

Low Level Voltage

Power on Reset = 2mA

250

500

mV

Enable Input Current

100

µA

–200

µA

Input Current at Park

100

µA

–200

µA

Enable Low Input Voltage

0.8

V

Enable High Input Voltage

2

V

Parking Input High Voltage

2

V

Parking Input Low Voltage

0.8

V

Power Fail Low Output Voltage

0.5

V

Parking Voltage Program Current

100

µA

Power On Reset Delay

Capacitor Charging

5

µA

Equivalent Input Resistance at

5V Filter Input

6.9

k

Ω

L6243DS

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