ADA4430-1

Rev. C | Page 17 of 20

OUTLINE DIMENSIONS

1.30 BSC

COMPLIANT TO JEDEC STANDARDS MO-203-AB

1.00

0.90

0.70

0.46

0.36

0.26

2.20

2.00

1.80

2.40

2.10

1.80

1.35

1.25

1.15

0.10 MAX

1.10

0.80

0.40

0.10

0.22

0.08

3

12

4

6

5

0.65 BSC

COPLANARITY

0.10

SEATING

PLANE

0.30

0.15

Figure 35. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]

(KS-6)

Dimensions shown in millimeters

COMPLIANT TO JEDEC STANDARDS MO-178-AB

10°

4°

0°

SEATING

PLANE

1.90

BSC

0.95 BSC

0.60

BSC

65

12

3

4

3.00

2.90

2.80

3.00

2.80

2.60

1.70

1.60

1.50

1.30

1.15

0.90

0.15 MAX

0.05 MIN

1.45 MAX

0.95 MIN

0.20 MAX

0.08 MIN

0.50 MAX

0.30 MIN

0.55

0.45

0.35

PIN 1

INDICATOR

Figure 36. 6-Lead Small Outline Transistor Package [SOT-23]

(RJ-6)

Dimensions shown in millimeters