REV. D

AD8601/AD8602/AD8604

–13–

SETTLING TIME – ns

5

5

3

0

1

3

4

2

1

01,000

200

400

600

800

0.1%

0.01%

0.01%

0.1%

2

4

TPC 49. Output Swing vs. Settling Time

THEORY OF OPERATION

The AD8601/AD8602/AD8604 family of amplifiers are rail-to-

rail input and output precision CMOS amplifiers that operate

from 2.7 V to 5.0 V of power supply voltage. These amplifiers

degree of precision than available from most CMOS amplifiers.

DigiTrim technology is a method of trimming the offset volt-

age of the amplifier after it has already been assembled. The

advantage in post-package trimming lies in the fact that it cor-

rects any offset voltages due to the mechanical stresses of

assembly. This technology is scalable and used with every

package option, including SOT-23-5, providing lower offset

voltages than previously achieved in these small packages.

The DigiTrim process is done at the factory and does not add

additional pins to the amplifier. All AD860x amplifiers are

available in standard op amp pinouts, making DigiTrim com-

pletely transparent to the user. The AD860x can be used in any

precision op amp application.

The input stage of the amplifier is a true rail-to-rail architecture,

allowing the input common-mode voltage range of the op amp

to extend to both positive and negative supply rails. The voltage

swing of the output stage is also rail-to-rail and is achieved by

using an NMOS and PMOS transistor pair connected in a com-

mon-source configuration. The maximum output voltage swing

is proportional to the output current, and larger currents will

limit how close the output voltage can get to the supply rail.

This is a characteristic of all rail-to-rail output amplifiers. With

1 mA of output current, the output voltage can reach within

20 mV of the positive rail and within 15 mV of the negative rail.

At light loads of >100 k

Ω, the output swings within ~1 mV of

the supplies.

The open-loop gain of the AD860x is 80 dB, typical, with a load

of 2 k

Ω. Because of the rail-to-rail output configuration, the

gain of the output stage and the open-loop gain of the amplifier

are dependent on the load resistance. Open-loop gain will de-

crease with smaller load resistances. Again, this is a characteristic

inherent to all rail-to-rail output amplifiers.

Rail-to-Rail Input Stage

The input common-mode voltage range of the AD860x extends

to both positive and negative supply voltages. This maximizes the

usable voltage range of the amplifier, an important feature for

single-supply and low voltage applications. This rail-to-rail

input range is achieved by using two input differential pairs, one

NMOS and one PMOS, placed in parallel. The NMOS pair is

active at the upper end of the common-mode voltage range, and

the PMOS pair is active at the lower end.

The NMOS and PMOS input stages are separately trimmed

using DigiTrim to minimize the offset voltage in both differen-

tial pairs. Both NMOS and PMOS input differential pairs are

active in a 500 mV transition region, when the input common-

mode voltage is between approximately 1.5 V and 1 V below the

positive supply voltage. Input offset voltage will shift slightly in

this transition region, as shown in TPCs 5 and 6. Common-

mode rejection ratio will also be slightly lower when the input

common-mode voltage is within this transition band. Compared

to the Burr Brown OPA2340 rail-to-rail input amplifier, shown

in Figure 1, the AD860x, shown in Figure 2, exhibits lower

offset voltage shift across the entire input common-mode range,

including the transition region.

0.7

0.4

1.4

0

5

1

23

4

0.2

0.5

0.8

1.1

0.1

Figure 1. Burr Brown OPA2340UR Input Offset

Voltage vs. Common-Mode Voltage, 24 SOIC

Units @ 25

°C

0.7

0.4

1.4

0

5

1

23

4

0.2

0.5

0.8

1.1

0.1

Figure 2. AD8602AR Input Offset Voltage vs.

Common-Mode Voltage, 300 SOIC Units @ 25

°C