AD8223

Preliminary Technical Data

Rev.

PrA | Page 14 of 20

REFERENCE TERMINAL

The output voltage of the AD8223 is developed with respect to

the potential on the reference terminal. This is useful when the

output signal needs to be offset to a precise midsupply level. For

example, a voltage source can be tied to the REF pin to level-

shift the output so that the AD8223 can drive a single-supply

ADC. The REF pin is protected with ESD diodes and should

For best performance, source impedance to the REF terminal

should be kept below 5 Ω. As shown in Figure 29, the reference

terminal, REF, is at one end of a 50 kΩ resistor. Additional

impedance at the REF terminal adds to this resistor and results

in poorer CMRR performance.

INCORRECT

AD8223

CORRECT

AD8223

OP2177

+

–

Figure 30. Driving the Reference Pin

INPUT PROTECTION

Internal supply referenced clamping diodes allow the input,

reference, output, and gain terminals of the AD8223 to safely

withstand overvoltages of 0.3 V above or below the supplies.

This is true for all gains, and for power-on and power-off. This

last case is particularly important because the signal source and

amplifier may be powered separately.

If the overvoltage is expected to exceed this value, the current

through these diodes should be limited to about 10 mA using

external current limiting resistors. This is shown in Figure 31.

The size of this resistor is defined by the supply voltage and the

required overvoltage protection.

10mA

1 = 10mA MAX

OUTPUT

AD8223

+

–

Figure 31. Input Protection

RF INTERFERENCE

RF rectification is often a problem when amplifiers are used in

applications where there are strong RF signals. The disturbance

can appear as a small dc offset voltage. High frequency signals

can be filtered with a low-pass, R-C network placed at the input

of the instrumentation amplifier, as shown in Figure 32. The

filter limits the input signal bandwidth according to the follow-

ing relationship:

)

(2

2

1

C

D

Diff

C

C

R

FilterFreq

+

π

=

C

CM

RC

FilterFreq

π

=

2

1

R

R

AD8223

+15V

+IN

–IN

0.1µF

10µF

10µF

0.1µF

REF

–15V

R1

499

Ω

47nF

1nF

1nF

4.02k

Ω

4.02k

Ω

+

–

+

Figure 32. RFI Suppression

Figure 32 shows an example where the differential filter

frequency is approximately 400 Hz, and the common-mode

filter frequency is approximately 40 kHz. The typical dc offset

shift over frequency is less than 1.5 μV and the circuit’s RF

signal rejection is better than 71 dB.

The resistors were selected to be large enough to isolate the

circuit’s input from the capacitors, but not large enough to

the CMRR of the AD8223. Because of their higher accuracy and

stability, COG/NPO type ceramic capacitors are recommended

as critical.