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IS25LP02GJ-RHLA3 数据表(PDF) 119 Page - Integrated Silicon Solution, Inc |
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IS25LP02GJ-RHLA3 数据表(HTML) 119 Page - Integrated Silicon Solution, Inc |
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119 / 182 page  IS25LP02GJ IS25WP02GJ Integrated Silicon Solution, Inc.- www.issi.com 119 Rev.A 10/02/2025 Figure 8.79 Software Reset Enable and Software Reset Sequence In QPI Mode (RSTEN, 66h + RST, 99h) 66h CE# SCK IO[3:0] 0 1 Mode 3 Mode 0 99h 0 1 8.39 SECURITY INFORMATION ROW The security Information Row is comprised of an additional 4 x 1K bytes of programmable information. The security bits can be reprogrammed by the user. Any program security instruction issued while an erase, program or write cycle is in progress is rejected without having any effect on the cycle that is in progress. Table 8.10 Information Row Valid Address Range Address Assignment A[23:14] A[13:10] A[9:0] IRL0 (Information Row Lock0) 000h 0h Byte address IRL1 000h 4h Byte address IRL2 000h 8h Byte address IRL3 000h Ch Byte address Bit 7~4 of the Function Register is used to permanently lock the programmable memory array. When Function Register bit IRLx = “0”, the 1K bytes of the programmable memory array can be programmed. When Function Register bit IRLx = “1”, the 1K bytes of the programmable memory array function as read only. |
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