 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
IS25WP02GJ-RHLA3 数据表(PDF) 28 Page - Integrated Silicon Solution, Inc |
|
|
|||||||||||||||||||||||||||||
IS25WP02GJ-RHLA3 数据表(HTML) 28 Page - Integrated Silicon Solution, Inc |
|
|
28 / 182 page  IS25LP02GJ IS25WP02GJ Integrated Silicon Solution, Inc.- www.issi.com 28 Rev.A 10/02/2025 Table 6.10 Wrap Function Wrap around boundary P2 Whole array regardless of P1 and P0 value 0 Burst Length set by P1 and P0 1 Table 6.11 Read Dummy Cycles vs Max Frequency P[6:3] Dummy Cycles2,3 Fast Read5 0Bh/0Ch Fast Read Dual Output 3Bh/3Ch Fast Read Dual IO BBh/BCh Fast Read Quad Output 6Bh/6Ch Fast Read Quad IO EBh/ECh FRDTR 0Dh/0Eh FRDDTR BDh/BEh FRQDTR EDh/EEh SPI QPI SPI SPI SPI SPI, QPI SPI/QPI SPI4 SPI, QPI 0 Default1 166MHz 81MHz 166MHz 104MHz 145MHz 81MHz 104/69MHz 60MHz 69MHz 1 1 98MHz 23MHz 75MHz 45MHz 63MHz 23MHz 50/11MHz 29MHz 11MHz 2 2 110MHz 34MHz 84MHz 70MHz 75MHz 34MHz 63/23MHz 40MHz 23MHz 3 3 122MHz 46MHz 98MHz 93MHz 87MHz 46MHz 75/34MHz 52MHz 34MHz 4 4 133MHz 58MHz 125MHz 104MHz 98MHz 58MHz 85/46MHz 60MHz 46MHz 5 5 145MHz 69MHz 135MHz 120MHz 110MHz 69MHz 95/58MHz 65MHz 58MHz 6 6 156MHz 81MHz 150MHz 133MHz 122MHz 81MHz 104/69MHz 80MHz 69MHz 7 7 166MHz 93MHz 166MHz 145MHz 133MHz 93MHz 104/80MHz 90MHz 80MHz 8 8 166MHz 104MHz 166MHz 156MHz 145MHz 104MHz 104/90MHz 104MHz 90MHz 9 9 166MHz 112MHz 166MHz 166MHz 156MHz 112MHz 104/104MHz 104MHz 104MHz 10 10 166MHz 127MHz 166MHz 166MHz 166MHz 127MHz 104/104MHz 104MHz 104MHz 11 11 166MHz 139MHz 166MHz 166MHz 166MHz 139MHz 104/80MHz 104MHz 104MHz 12 12 166MHz 151MHz 166MHz 166MHz 166MHz 151MHz 104/80MHz 104MHz 104MHz 13 13 166MHz 162MHz 166MHz 166MHz 166MHz 162MHz 104/104MHz 104MHz 104MHz 14 14 166MHz 166MHz 166MHz 166MHz 166MHz 166MHz 104/104MHz 104MHz 104MHz 15 15 166MHz 166MHz 166MHz 166MHz 166MHz 166MHz 104/104MHz 104MHz 104MHz Notes: 1. Default dummy cycles are as follows. Operation Command Dummy Cycles Comment SPI mode QPI mode SPI mode QPI mode Fast Read 0Bh/0Ch 0Bh/0Ch 8 6 RDUID, IRRD operations are also applied. Fast Read Dual Output 3Bh/3Ch - 8 - Fast Read Quad Output 6Bh/6Ch - 8 - Fast Read Dual IO BBh/BCh - 4 - Fast Read Quad IO EBh/ECh EBh/ECh 6 6 Fast Read DTR 0Dh/0Eh 0Dh/0Eh 8 6 Fast Read Dual IO DTR BDh/BEh - 4 - Fast Read Quad IO DTR EDh/EEh EDh/EEh 6 6 2. Enough number of dummy cycles must be applied to execute properly the AX read operation. 3. Must satisfy bus I/O contention. For instance, if the number of dummy cycles and AX bits cycles are same, then X must be Hi-Z. 4. QPI mode is not available for FRDDTR command. 5. RDUID, IRRD instructions are also applied. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
