DESCRIPTION (continued)

The diagnostic part allows to monitor failures due

to overtemperature or wrong card positioning.

The failures are internally coded and readable in-

side the STATUS REGISTER through the bidirec-

tional pin DATA configurated in output.

The antibouncing circuitry, active during card in-

sertion only, rejects ripetitive switching-on of the

power supply sections.

PIN FUNCTION

Pin

Description

Programmable output regulated voltage for memory card writing; 8 voltage levels are allowed by

µP allowing or not the normal R/W

operations on the card.

SWIT CH

Input signal produced by the reader system indicating that a card has been inserted. Internally, an

antibouncing system is provided to avoid multiple switching.

CS

Chip select (active low). CS low level indicates an I/O operation request from

µP.

IRQ

Interrupt Request (Active low).

An IRQ low level indicates that a card insertion/extraction or Failure has occured.

PRG

Program (Active low).

DATA

I/O pin for data exchange between

µP and the device. Through this pin flow 3 bit input DAC or 2 bit

STATUS REGISTER code.

CK

External clock.

Pin to connect an external capacitor for antibouncing delay time.

GND

4 pins to ground.

PIN CONNECTIONS (Top view)

Powerdip 12+3+3

SO 12+4+4

THERMAL DATA

Symbol

Parameter

L6605

L6605D

Unit

Thermal Resistance Junction to Ambient

60

50 (*)

°C/W

(*) Soldered an a 35

L6605

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