数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

L6910ATR 数据表(PDF) 9 Page - STMicroelectronics

部件名 L6910ATR
功能描述  ADJUSTABLE STEP DOWN CONTROLLER WITH SYNCHRONOUS RECTIFICATION
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6910ATR 数据表(HTML) 9 Page - STMicroelectronics

Back Button L6910ATR Datasheet HTML 5Page - STMicroelectronics L6910ATR Datasheet HTML 6Page - STMicroelectronics L6910ATR Datasheet HTML 7Page - STMicroelectronics L6910ATR Datasheet HTML 8Page - STMicroelectronics L6910ATR Datasheet HTML 9Page - STMicroelectronics L6910ATR Datasheet HTML 10Page - STMicroelectronics L6910ATR Datasheet HTML 11Page - STMicroelectronics L6910ATR Datasheet HTML 12Page - STMicroelectronics L6910ATR Datasheet HTML 13Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 21 page
background image
9/21
L6910A L6910
Output Capacitor
The output capacitor is a basic component for the fast response of the power supply. In fact, during load tran-
sient, for first few microseconds they supply the current to the load. The controller recognizes immediately the
load transient and sets the duty cycle at 100%, but the current slope is limited by the inductor value. The output
voltage has a first drop due to the current variation inside the capacitor (neglecting the effect of the ESL):
A minimum capacitor value is required to sustain the current during the load transient without discharge it. The
voltage drop due to the output capacitor discharge is given by the following equation:
Where DMAX is the maximum duty cycle value that is 100%. The lower is the ESR, the lower is the output drop
during load transient and the lower is the output voltage static ripple.
Input Capacitor
The input capacitor has to sustain the ripple current produced during the on time of the upper MOS, so it must
have a low ESR to minimize the losses. The rms value of this ripple is:
Where D is the duty cycle. The equation reaches its maximum value with D = 0.5. The losses in worst case are:
Compensation network design
The control loop is a voltage mode (figure 7). The output voltage is regulated to the input Reference voltage
level (EAREF). The error amplifier output VCOMP is then compared with the oscillator triangular wave to provide
a pulse-width modulated (PWM) wave with an amplitude of VIN at the PHASE node. This wave is filtered by the
output filter. The modulator transfer function is the small-signal transfer function of VOUT/VCOMP. This function
has a double pole at frequency FLC depending on the L-Cout resonance and a zero at FESR depending on the
output capacitor ESR. The DC Gain of the modulator is simply the input voltage VIN divided by the peak-to-peak
oscillator voltage
∆VOSC.
V
OUT
I
OUT
ESR
=
V
OUT
I
OUT
2
L
2C
OUT
V
IN M IN
D
MAX
V
OUT
()
⋅⋅
---------------------------------------------------------------------------------------------
=
I
rm s
I
OUT
D1
D
()
=
P
ESR I
rm s
2
=



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com