L6996

10/26

1

DEVICE DESCRIPTION

1.1 Constant On Time PWM Topology

Figure 12. Loop block schematic diagram

This device implements a Constant On Time control, where the Ton is the on time duration forced by a one-shot

the OSC pin voltage as in Eq 1:

Eq 1

Eq 2

where

Eq 3

The above equations allow setting the frequency divider ratio aOSC once output voltage has been set; note that

sure the boot capacitor charge and to limit switching frequency after a load transient as well as to mask PWM

comparator output against switching noise and spikes.

The system has not an internal clock, because this is a hysteretic controller, so the turn on pulse will start if three

Q

Vprog

LS

HS

VFB+

DS

CS-

VID0-4

Rsense

R1

R

S

Vout

Vin

HGATE

LGATE

Q

R2

PWM comparator

VFB-

FFSR

One-shot generator

OSC

-

+

+

-

DAC

T

ON

K

OSC

V

CS-

V

OS C

---------------

τ

+

=

F

SW

V

OUT

V

IN

---------------

1

T

ON

-----------

⋅α

OSC

→

F

SW

K

OSC

⋅

==

α

OSC

V

OS C

V

IN

---------------

R

2

R

2

R

1

+

--------------------

==