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L9341 数据表(PDF) 4 Page - STMicroelectronics |
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L9341 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 10 page ![]() 15 CLK PWM3 PWM4 PWM1 PWM2 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Figure 1: Logic Diagram of PWM Generation. +12V I s I s 12V 0 1A 1A 0 0 du/dt du/dt di/dt di/dt di/dt di/dt 5% 5% Internal PWM Signal I I Current through Flyback Diode Current through Low Side Switch I GND out V out t dpo out t dpo f I f D DMOS D OUT Vs D I f Output Voltage V 20 mH 5 10 nF 220 nF Figure 2: Output Switching Diagram. 220 nF D1 Schaffner Generator 4 x 10 nF -2V to 40 V Vs GND OUT1 OUT2 OUT3 OUT4 4x 1 nF +12V 10 uF VCC +5V Figure 3: Test Circuit for Schaffner Pulses. INTERNAL CLOCK L9341 4/10 |
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