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LAN8808D 数据表(PDF) 41 Page - Microchip Technology |
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LAN8808D 数据表(HTML) 41 Page - Microchip Technology |
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41 / 80 page  LAN8808D © 2026 Microchip Technology Inc. and its subsidiaries DS00005833C-page 41 5.12 Loopbacks The device supports the following loopback operations to verify analog and/or digital paths: • Digital (Near-End) Loopback • Remote (Far-End) Loopback • External Connector Loopback • QSGMII Loopback All loopbacks are enabled on an individual per-port basis. 5.12.1 DIGITAL (NEAR-END) LOOPBACK This loopback mode checks the QSGMII transmit and receive data paths between the device and the external MAC, and is supported for all three speeds (10/100/1000 Mbps) at full-duplex. The loopback data path is shown in Figure 5-3. 1. QSGMII MAC transmits frames to the device. 2. Frames are wrapped around inside the device. 3. The device transmits frames back to QSGMII MAC. 5.12.2 REMOTE (FAR-END) LOOPBACK This loopback mode checks the line (differential pairs, transformer, RJ-45 connector, Ethernet cable) transmit and receive data paths between the device and its link partner, and is supported for 1000BASE-T full-duplex mode only. The loopback data path is shown in Figure 5-4. 1. The Gigabit PHY link partner transmits frames to the device. 2. Frames are wrapped around inside the device. 3. The device transmits frames back to the Gigabit PHY link partner. FIGURE 5-3: DIGITAL (NEAR-END) LOOPBACK FIGURE 5-4: REMOTE (FAR-END) LOOPBACK PCS PMA LAN8808D MAC Switch or SoC Link Partner GPHY Port X PCS1G Port X PCS1G PCS1G PCS1G Other Ports MAC MAC MAC Port X QSGMII PCS PMA LAN8808D MAC Switch or SoC Link Partner GPHY Port X PCS1G Port X PCS1G PCS1G PCS1G Other Ports MAC MAC MAC Port X QSGMII |
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