PRELIMINARY
CY2DP818-2
Document #: 38-07588 Rev. **
Page 2 of 8
Pin Description
Pin Number
Pin Name
Pin Standard Interface
Description
1, 9,12,18,19,20,38
GND
POWER
Ground
2,8,13,29,17
VDD
POWER
Power Supply
3,4,5,6,14,15,16
EN(1:7)
LVTTL/LVCMOS
The respective outputs are enabled when these
pins are pulled high. Outputs are disabled when
connected to GND. EN7 controls both Q7(A,B) and
Q8(A,B)
10,11
Input A, Input B
Default: LVPECL/LDVS
Optional: LVTTL/LVCMOS
single pin
Differential input pair or single line. LVPECL/LVDS
default. See InConfig, below.
37, 36,35,34,
33,32,31, 30,
28,27,26,25,
24,23,22,21
Q1(A,B), Q2(A,B)
Q3(A,B), Q4(A,B)
Q5(A,B), Q6(A,B)
Q7(A,B), Q8(A,B)
LVPECL
Differential Outputs
7
InConfig
LVTTL/LVCMOS
Converts inputs from the default
LVPECL/LVDS (logic = 0)
to LVTTL/LVCMOS (logic = 1)
See Input Receiver Configuration for Differential or
LVTTL/LVCMOS table (below), Figure 5 and Figure 6
for additional Information
Power Supply Characteristics
Parameter
Description
Test Conditions
Min. Typ. Max.
Unit
ICCD
Dynamic Power Supply Current
VDD = Max.
Input toggling 50% Duty Cycle, Outputs Open
1.5
2.0
mA/
MHz
IC
Total Power Supply Current
VDD = Max.
Input toggling 50% Duty Cycle, Outputs 50 ohms,
fL=100 MHz
350
mA
IC Core
Core current when output loads are
disabled
VDD = Max.
Input toggling 50% Duty Cycle, Outputs Disabled,
not connected to VTT fL = 100 MHz
50
mA
Input Receiver Configuration for Differential or LVTTL/LVCMOS
INCONFIG Pin 7 Binary Value
Input Receiver Family
Input Receiver Type
1
LVTTL in LVCMOS
Single-ended, non-inverting, inverting, void of bias resistors
0
LVDS
Low-voltage differential signaling
LVPECL
Low-voltage pseudo (positive) emitter coupled logic
Function Control of the TTL Input Logic used to Accept or Invert the Input Signal
LVTTL/LVCMOS Input Logic
Input Condition
Input Logic
Output Logic Q Pins, Q1A or Q1
Ground
Input B (–) Pin 11
Input A (+) Pin 10
Input
True
VDD
Input B (–) Pin 11
Input A (+) Pin 10
Input
Invert
Ground
Input A (+) Pin 10
Input B (–) Pin 11
Input
Invert
VDD
Input A (+) Pin 10
Input B (–) Pin 11
Input
True
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