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L9386MD 数据表(PDF) 3 Page - STMicroelectronics |
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L9386MD 数据表(HTML) 3 Page - STMicroelectronics |
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3 / 10 page ![]() ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Value Tj1 Unit Min. Typ. Max. ISSB Static standby supply current b) c) VEN =L, VO ≤ VOuv 0.73 1.5 15 mA mA IS DC supply current b) c) VEN =VIN =H 1.3 5 15 mA mA VDL Diagnostic ouput low voltage b) ID = 2mA c) ID = 1mA 0.35 0.5 V IDLE Diagnostic output leakage current VS = 0V or VS = open; VD = 5.5V Tj ≤ 125°C 0.1 2 µA ID Diagnostic output current capability VD ≤ 16V DIAG = L 2 6 30 mA VOUV Open load voltage threshold VEN =X, VIN = L 0.51 xVS 0.55 xVS 0.59 xVS V ∆VOUV1,2 Open load difference voltage threshold b) VEN = X, VIN1,2 =L VS ≥ VOC ≥ VOUV VOC = output voltage of other channel c) VOC- 0.9V VOC- 0.7V VOC- 1.25V VOC- 1.25V VOC- 1.6V VOC- 1.8V V 1) V IOUC Open load current threshold a) VEN =VIN =H c) 100 20 320 480 mA mA IOOC Over load current threshold b) 5 7 A VOCL Output voltage during clamping IOCL ≥ 100mA 45 52 60 V SON,OFF Output (fall, rise) slew rate a) Fig. 2 200 1500 3200 V/ms RIO Internal output pull down resistor VEN = L 10 20 40 K Ω RDSON Output on resistance VS > 9.5V IO = 2A Tj =25 °C Tj = 150 °C 200 300 500 m Ω m Ω V(EN,IN)L Logic input low voltage |IEN, IN| ≤ 10mA b) c) -1.5 -1.5 1 0.5 V V V(EN,IN)H Logic input high voltage 2.2 5.5 V V(EN,IN)hys Logic input hysteresis 0.2 0.4 1 V IEN Enable input sink current 1V ≤ VEN ≤ 5.5V 10 30 60 µA IIN Logic input sink current 1V ≤ VIN ≤ 5.5V 40 95 180 µA tDON Output delay ON time a) Fig. 2 4 25 µs tD OFF Output delay OFF time a) Fig. 2 5 15 30 µs tD H-L, Diag. Diag. delay output OFF time a) Fig. 2 5 30 65 µs tD IOu Diagnostic open load delay time a) Fig. 4 8 50 µs tDOL Diagnostic overload delay switch-off time a) Fig. 1 50 160 300 µs a) 9V ≤ VS ≤ 16V (Nominal operating range) RL ≤ 6Ω, IO ≤ IOOC b) 6.5V ≤ VS ≤ 16V (Diagnostic operation range) c) 4.5V ≤ VS < 6.5V and 16V < VS ≤ 32V (Extended operation range) 1) Limit under evaluation. L9386MD 3/10 |
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