STM32L4P5CEU6P datasheet(159/311 Pages) STMICROELECTRONICS

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Table 38. Typical current consumption in Run and Low-power run modes with different codes

running from Flash, ART disable and power supplied by external SMPS

Symbol

Parameter

Conditions(1)

TYP

Single Bank

Mode

TYP

Dual Bank

Mode

Unit

TYP

Single Bank

Mode

TYP

Dual Bank

Mode

Unit

VDD12

fHCLK

Code

25°C

IDD

(Run)

Supply

current in

Run mode

fHCLK=fHSE up to

48 MHZ

included, bypass

mode PLL ON

above 48 MHz

all peripherals

disable

VDD12=

1.00V

fHCLK=

26 MHz

Reduced code

1.35

1.39

µA/MHz

Coremark

1.41

1.29

Dhrystone2.1

1.43

1.31

Fibonacci

1.39

1.2

While(1)

1.09

VDD12=

1.10V

fHCLK=

26 MHz

Reduced code

1.63

1.68

µA/MHz

Coremark

1.7

1.57

Dhrystone2.1

1.73

1.59

Fibonacci

1.68

1.45

While(1)

1.32

fHCLK=

80 MHz

Reduced code

4.49

4.31

µA/MHz

Coremark

4.49

3.95

Dhrystone2.1

4.49

4.13

Fibonacci

4.31

3.77

While(1)

3.77

IDD

(Run)

Supply

current in

Run mode

fHCLK=fHSE up to

48 MHZ

included, bypass

mode PLL ON

above 48 MHz

all peripherals

disable

VDD12=

1.20V

fHCLK=

120

MHz

Reduced code

7.02

6.42

µA/MHz

Coremark

6.82

6.02

Dhrystone 2.1

6.82

6.02

Fibonacci

6.82

5.61

While(1)

6.62

All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS input = 3.3 V, SMPS efficiency = 85%,

VDD12 = 1.10 V.

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