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STM32L4P5CEU6P 数据表(PDF) 17 Page - STMicroelectronics |
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STM32L4P5CEU6P 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 311 page  DS12903 Rev 2 17/311 STM32L4P5xx Description 18 HASH (SHA-256) Yes GPIOs(8) Wakeup pins Nb of I/Os down to 1.08 V 38 3 0 52 4 0 83(9) 5 0 110 5 14 115 5 14 136 5 14 Capacitive sensing Number of channels 921 24 12-bit ADCs Number of channels 2 10 16 16 16 16 16 12-bit DAC channels 2 Internal voltage reference buffer Yes Analog comparator 2 Operational amplifiers 2 Max. CPU frequency 120 MHz Operating voltage (VDD) 1.71 to 3.6 V Operating voltage (VDD12) 1.00 to 1.32 V Operating temperature Ambient operating temperature: -40 to 85 °C / -40 to 125 °C Packages UFQFPN48/ LQFP48 LQFP64 LQFP100/ WLCSP100 UFBGA132 LQFP144 UFBGA169 1. For the LQFP100 package, only FMC bank1 and NAND bank are available. Bank1 can only support a multiplexed NOR/PSRAM memory using the NE1 chip select. 2. When multiplexed mode is enabled two OCTOSPIs are available, otherwise only one OCTOSPI is available, for further details on multiplexed mode refer to the RM0432 reference manual. 3. For 48-pin and 64-pin packages only 1x UART is available. 4. For 48 pins packages only one SDMMC2 with SDIO 4-bits is available. SDMMC1 and SDMMC2 are available for packages starting from 64 pins. 5. DCMI is available on devices with packages starting from 64-pin. 6. PSSI is available on devices with packages starting from 64-pin. 7. For 48-pin and 64-pin packages, only RGB222 parallel output is supported. 8. When an SMPS package type is used, two GPIOs are replaced by VDD12 pins to connect the SMPS power supplies hence the available GPIOs number is reduced by two. 9. 81 GPIOs available for WLCSP100 package. Table 2. STM32L4P5xx features and peripheral counts (continued) Peripheral STM32L4 P5CG/P5CE (48 pins) STM32L4 P5RG/P5RE (64 pins) STM32L4 P5VG/P5VE (100 pins) STM32L4 P5QG/P5QE (132 pins) STM32L4 P5ZG/P5ZE (144 pins) STM32L4 P5AG/P5AE (169 pins) |
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